Power measurement, Power measurement –55 – Altera Arria V SoC Development Board User Manual

Page 63

Advertising
background image

Chapter 2: Board Components

2–55

Power Supply

July 2014

Altera Corporation

Arria V SoC Development Board

Reference Manual

Power Measurement

There are eleven power supply rails that have on-board current sense capabilities
using 16-bit differential ADC devices. Precision sense resistors split the ADC devices
and rails from the primary supply plane for the ADC to measure current.

Figure 2–10

shows the block diagram for the power measurement circuitry.

Table 2–35

lists the targeted rails. The schematic signal name column specifies the

name of the rail being measured while the device pin column specifies the devices
attached to the rail.

Figure 2–10. Power Measurement Circuit

SCK

SPI Bus

DSI

DSO

CSn

8 Ch.

Power Supply Load #0-6

R

SENSE

MAX V CPLD

5M2210

System

Controller

Arria V SoC

To User PC

JTAG Chain

Feedback

14-pin

2x16

Character

LCD

E
RW

RS

D(0:7)

Supply

#0-6

EPM570

USB
PHY

Embedded

USB-Blaster II

Table 2–35. Power Measurement Rails (Part 1 of 2)

Channel

Schematic Signal Name

Voltage (V)

Device Pin

Description

0

2.5V_FPGA

2.5

VCCIO

I/O, FPGA internal and peripheral devices

VCCPD

VCC

1

1.5V_FPGA

1.5

VCCIO

I/O and DDR3 devices

2

1.15V_VCC

1.15

VCC

FPGA core power, transceiver, and clock

3

VAR_VCCIO

2.5, 1.8, 1.5,

1.2

VCCIO

FMC I/O

4

1.15V_GXB

1.15

VCCR_GXB

Receiver power

VCCL_GXB

Transceiver clock network

5

1.15V_VCCT

1.15

VCCT_GXB

Transmitter power

6

1.5V_VCCD/VCCH

1.5

VCCD_FPLL

Phase-locked loop (PLL) digital power

VCCH_GXB

Transmitter output buffer power

7

1.15V_HPS

1.15

VCC_HPS

HPS core power

8

1.5V_HPS

1.5

VCCIO_HPS

I/O and DDR3 devices

Advertising