Altera Arria V SoC Development Board - Manual (Page 50)

2–42 Chapter 2: Board Components
Memory
Arria V SoC Development Board July 2014 Altera Corporation
Reference Manual
H7 DDR3A_DQ4 AG26 1.5-V SSTL Class I Data bus
F7 DDR3A_DQ5 AD25 1.5-V SSTL Class I Data bus
E3 DDR3A_DQ6 AC25 1.5-V SSTL Class I Data bus
F2 DDR3A_DQ7 AB25 1.5-V SSTL Class I Data bus
C2 DDR3A_DQ8 AV24 1.5-V SSTL Class I Data bus
A2 DDR3A_DQ9 AV25 1.5-V SSTL Class I Data bus
D7 DDR3A_DQ10 AL26 1.5-V SSTL Class I Data bus
A7 DDR3A_DQ11 AW26 1.5-V SSTL Class I Data bus
C8 DDR3A_DQ12 AW25 1.5-V SSTL Class I Data bus
B8 DDR3A_DQ13 AT25 1.5-V SSTL Class I Data bus
A3 DDR3A_DQ14 AN25 1.5-V SSTL Class I Data bus
C3 DDR3A_DQ15 AM25 1.5-V SSTL Class I Data bus
F3 DDR3A_DQS_P0 AF25
Differential 1.5-V
SSTL Class I
Data strobe P byte lane 0
G3 DDR3A_DQS_N0 AE25
Differential 1.5-V
SSTL Class I
Data strobe N byte lane 0
C7 DDR3A_DQS_P1 AU26
Differential 1.5-V
SSTL Class I
Data strobe P byte lane 1
B7 DDR3A_DQS_N1 AT26
Differential 1.5-V
SSTL Class I
Data strobe N byte lane 1
K1 DDR3A_ODT AM31 1.5-V SSTL Class I On-die termination enable
J3 DDR3A_RASN AN31 1.5-V SSTL Class I Row address select
T2 DDR3A_RESETN AB29 1.5-V SSTL Class I Reset
L3 DDR3A_WEN AW33 1.5-V SSTL Class I Write enable
L8 DDR3A_ZQ — 1.5-V SSTL Class I ZQ impedance calibration
DDR3 x32 (U49)
N3 DDR3B_A0 AP16 1.5-V SSTL Class I Address bus
P7 DDR3B_A1 AN16 1.5-V SSTL Class I Address bus
P3 DDR3B_A2 AK16 1.5-V SSTL Class I Address bus
N2 DDR3B_A3 AJ16 1.5-V SSTL Class I Address bus
P8 DDR3B_A4 AV16 1.5-V SSTL Class I Address bus
P2 DDR3B_A5 AU16 1.5-V SSTL Class I Address bus
R8 DDR3B_A6 AT16 1.5-V SSTL Class I Address bus
R2 DDR3B_A7 AR16 1.5-V SSTL Class I Address bus
T8 DDR3B_A8 AP17 1.5-V SSTL Class I Address bus
R3 DDR3B_A9 AN17 1.5-V SSTL Class I Address bus
L7 DDR3B_A10 AH17 1.5-V SSTL Class I Address bus
R7 DDR3B_A11 AG17 1.5-V SSTL Class I Address bus
N7 DDR3B_A12 AM18 1.5-V SSTL Class I Address bus
Table 2–27. DDR3 SDRAM Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 7)
Board
Reference
Schematic
Signal Name
Arria V SoC Pin
Number
I/O Standard Description