Altera Arria V SoC Development Board - Manual (Page 6)

1–2 Chapter 1: Overview
Board Component Blocks
Arria V SoC Development Board July 2014 Altera Corporation
Reference Manual
■ Memory
■ One 1,024-Mbyte (MB) HPS DDR3 SDRAM with error correction code (ECC)
support
■ Two 1,024-MB FPGA DDR3 SDRAM
■ One 512-Megabit (Mb) quad serial peripheral interface (QSPI) flash
■ One 512-Mb CFI synchronous flash
■ One 256-Mb NOR flash (EPCQ device)
■ One 32-Kilobit (Kb) I 2 C serial electrically erasable PROM (EEPROM)
■ One Micro SD flash memory card
■ Communication Ports
■ One PCI Express x4 Gen1/Gen2 socket
■ Two FPGA mezzanine card (FMC) ports
■ One USB 2.0 on-the-go (OTG) port
■ One Gigabit Ethernet port
■ Two 10/100 Ethernet ports
■ Two SFP+ ports
■ Two RS-232 UART (through the mini-USB port)
■ One real-time clock