Rainbow Electronics 71M6542G - Manual (Page 119)

v1.1 © 2008–2011 Teridian Semiconductor Corporation 119
Name Location Rst Wk Dir Description
MUX_DIV[3:0] 2100[7:4] 0 0 R/W
MUX_DIV[3:0] is the number of ADC time slots in each MUX frame. The
maximum number of time slots is 11.
OPT_BB 2457[0] 0 – R/W
Configures the input of the optical port to be a DIO pin to allow it to be
bit-banged. In this case, DIO5 becomes a third high speed UART. Refer to
2.5.7 UART and Optical Interface under the “Bit Banged Optical UART
(Third UART)” sub-heading on page 58 .
OPT_FDC[1:0] 2457[5:4] 0 – R/W
Selects OPT_TX modulation duty cycle.
OPT_FDC Function
00 50% Low
01 25% Low
10 12.5% Low
11 6.25% Low
OPT_RXDIS 2457[2] 0 – R/W
OPT_RX can be configured as an input to the optical UART or as SEGDIO55.
OPT_RXDIS = 0 and LCD_MAP[55] = 0: OPT_RX
OPT_RXDIS = 1 and LCD_MAP[55] = 0: DIO55
OPT_RXDIS = 0 and LCD_MAP[55] = 1: SEG55
OPT_RXDIS = 1 and LCD_MAP[55] = 1: SEG55
OPT_RXINV 2457[1] 0 – R/W
Inverts result from OPT_RX comparator when 1. Affects only the UART input.
Has no effect when OPT_RX is used as a DIO input.
OPT_TXE [1:0] 2456[3:2] 00 – R/W
Configures the OPT_TX output pin.
If LCD_MAP[51] = 0:
00 = DIO51, 01 = OPT_TX, 10 = WPULSE, 11 = VARPULSE
If LCD_MAP[51] = 1:
xx = SEG51
OPT_TXINV 2456[0] 0 – R/W Invert OPT_TX when 1. This inversion occurs before modulation.
OPT_TXMOD 2456[1] 0 – R/W
Enables modulation of OPT_TX. When OPT_TXMOD is set, OPT_TX is
modulated when it would otherwise have been zero. The modulation is applied
after any inversion caused by OPT_TXINV.
OSC_COMP 28A0[5] 0 – R/W
Enables the automatic update of RTC_P and RTC_Q every time the temperature
is measured.
PB_STATE SFR F8[0] 0 0 R The de-bounced state of the PB pin.
PERR_RD
PERR_WR SFR FC[6]
SFR FC[5]
0 0 R/W
The IC sets these bits to indicate that a parity error on the remote sensor has
been detected. Once set, the bits are remembered until they are cleared by
the MPU.
PLL_OK SFR F9[4] 0 0 R Indicates that the clock generation PLL is settled.