Rainbow Electronics 71M6542G - Manual (Page 68)

68 © 2008–2011 Teridian Semiconductor Corporation v1.1
The LCD bias may be compensated for temperature using the LCD_DAC[4:0] field (I/O RAM 0x240D[4:0]).
The bias may be adjusted from 1.4 V below the 3.3 V supply (V3P3SYS in MSN mode and VBAT in BRN
and LCD modes). When the LCD_DAC[4:0] field is set to 000, the DAC is bypassed and powered
down. This can be used to reduce current in LCD mode.
STATIC (LCD_MODE=100)
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
(1/2)
(1/2)
(1/2)
(1/2)
1/2 BIAS, 2 STATES (LCD_MODE = 010 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
(1/2)
(1/2)
(1/2)
0 1
1/2 BIAS, 3 STATES (LCD_MODE = 011 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
(1/2)
(1/2)
0 1 2
1/3 BIAS, 3 STATES (LCD_MODE = 011 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(2/3)
0 1 2
(1/3)
1/3 BIAS, 4 STATES (LCD_MODE = 000 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
0 1 2
1/3 BIAS, 6 STATES (LCD_MODE = 110 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
0 1 2 3 3 4 5
T
Figure 21: LCD Waveforms