Rainbow Electronics 71M6542G - Manual (Page 38)

38 © 2008–2011 Teridian Semiconductor Corporation v1.1
UART Control Registers:
The functions of UART0 and UART1 depend on the setting of the Serial Port Control Registers S0CON
and S1CON shown in
Table 19 and Table 20, respectively, and the PCON register shown in Table 21 .
Since the TI0, RI0, TI1 and RI1 bits are in an SFR bit addressable byte, common practice
would be to clear them with a bit operation, but this must be avoided. The hardware implements
bit operations as a byte wide read-modify-write hardware macro. If an interrupt occurs after
the read, but before the write, its flag is cleared unintentionally.
The proper way to clear these flag bits is to write a byte mask consisting of all ones except for
a zero in the location of the bit to be cleared. The flag bits are configured in hardware to ignore
ones written to them.
Table 19: The S0CON (UART0) Register (SFR 0x98)
Bit Symbol Function
S0CON[7] SM0 The SM0 and SM1 bits set the UART0 mode:
Mode Description SM0 SM1
0 N/A 0 0
1 8-bit UART 0 1
2 9-bit UART 1 0
3 9-bit UART 1 1
S0CON[6] SM1
S0CON[5] SM20 Enables the inter-processor communication feature.
S0CON[4] REN0 If set, enables serial reception. Cleared by software to disable reception.
S0CON[3] TB80 The 9th transmitted data bit in Modes 2 and 3. Set or cleared by the
MPU, depending on the function it performs (parity check, multiprocessor
communication etc.)
S0CON[2] RB80 In Modes 2 and 3 it is the 9
th
data bit received. In Mode 1, SM20 is 0,
RB80 is the stop bit. In mode 0, this bit is not used. Must be cleared by
software.
S0CON[1] TI0 Transmit interrupt flag; set by hardware after completion of a serial transfer.
Must be cleared by software (see Caution above).
S0CON[0] RI0 Receive interrupt flag; set by hardware after completion of a serial reception.
Must be cleared by software (see Caution above).
Table 20: The S1CON (UART1) Register (SFR 0x9B)
Bit Symbol Function
S1CON[7] SM Sets the baud rate and mode for UART1.
SM Mode Description Baud Rate
0 A 9-bit UART variable
1 B 8-bit UART variable
S1CON[5] SM21 Enables the inter-processor communication feature.
S1CON[4] REN1 If set, enables serial reception. Cleared by software to disable reception.
S1CON[3] TB81 The 9
th
transmitted data bit in Mode A. Set or cleared by the MPU,
depending on the function it performs (parity check, multiprocessor
communication etc.)
S1CON[2] RB81 In Modes A and B, it is the 9
th
data bit received. In Mode B, if SM21 is 0,
RB81 is the stop bit. Must be cleared by software
S1CON[1] TI1 Transmit interrupt flag, set by hardware after completion of a serial transfer.
Must be cleared by software (see Caution above).
S1CON[0] RI1 Receive interrupt flag, set by hardware after completion of a serial reception.
Must be cleared by software (see Caution above).