Rainbow Electronics 71M6542G - Manual (Page 33)

v1.1 © 2008–2011 Teridian Semiconductor Corporation 33
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF), sometimes referred
to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruction
MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide.
Table 11 shows the internal data memory map.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memory
is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW, SFR
0xD0 ) select which bank is in use. The next 16 bytes form a block of bit addressable memory space at
addresses 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect
addressing.
Table 11: Internal Data Memory Map
Address Range Direct Addressing Indirect Addressing
0x80 0xFF Special Function Registers (SFRs) RAM
0x30 0x7F Byte addressable area
0x20 0x2F Bit addressable area
0x00 0x1F Register banks R0…R7
2.4.2 Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 12 .
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses returns undefined data, while a write access has no effect. SFRs
specific to the 71M654x are shown in bold print on a shaded field. The registers at 0x80, 0x88, 0x90,
etc., are bit addressable, all others are byte addressable.
Table 12: Special Function Register Map
Hex/
Bin
Bit
Addressable
Byte Addressable Bin/
Hex
X000 X001 X010 X011 X100 X101 X110 X111
F8 INTBITS VSTAT RCMD SPI_CMD FF
F0 B F7
E8 IFLAGS EF
E0 A E7
D8 WDCON DF
D0 PSW D7
C8 T2CON CF
C0 IRCON C7
B8 IEN1 IP1 S0RELH S1RELH PDATA BF
B0 P3 (DIO12:15) FLSHCTL FLSHPG B7
A8 IEN0 IP0 S0RELL AF
A0 P2 (DIO8:11) A7
98 S0CON S0BUF IEN2 S1CON S1BUF S1RELL EEDATA EECTRL 9F
90 P1(DIO4:7) DPS ERASE 97
88 TCON TMOD TL0 TL1 TH0 TH1 CKCON 8F
80 P0 (DIO0:3) SP DPL DPH DPL1 DPH1 PCON 87