Rainbow Electronics 71M6542G - Manual (Page 53)

v1.1 © 2008–2011 Teridian Semiconductor Corporation 53






+
⋅ ∆ +
⋅
= + ⋅
−
5 . 0
10 1
8 32768
RTC_Q RTC_P 4
6
floor
Conversely, the amount of ppm shift for a given value of 4RTC_P+RTC_Q is:
∆ (𝑝𝑝𝑚) = �
32768 ∙ 8
4 ∗ 𝑅𝑇𝐶
𝑃
+ 𝑅𝑇𝐶
𝑄
− 1� 10 6
For example, for a shift of -988 ppm, 4
⋅RTC_P + RTC_Q = 262403 = 0x40103. RTC_P = 0x10040, and
RTC_Q = 0x03. The default values of RTC_P and RTC_Q, corresponding to zero adjustment, are 0x10000
and 0x0, respectively.
Two settings for the TMUX2OUT test pin, PULSE_1S and PULSE_4S, are available for measuring and
calibrating the RTC clock frequency. These are waveforms of approximately 25% duty cycle with 1s or 4s
period.
Default values for RTCA_ADJ, RTC_P and RTC_Q should be nominal values, at the center of
the adjustment range. Un-calibrated extreme values (zero, for example) can cause incorrect
operation.
If the crystal temperature coefficient is known, the MPU can integrate temperature and correct the RTC
time as necessary. Alternatively, the characteristics can be loaded into an NV RAM and the OSC_COMP
bit (I/O RAM 0x28A0[5]) may be set. In this case, the oscillator is adjusted automatically, even in SLP
mode. See the Real Time RTC Temperature Compensation section for details.
2.5.4.4 RTC Temperature Compensation
The 71M6541D/F and 71M6542F can be configured to regularly measure die temperature, including in
SLP and LCD modes and while the MPU is halted. If enabled by the OSC_COMP bit, the temperature
information is automatically used to correct for the temperature variation of the crystal. A table look-up
method is used which generates the required digital compensation without involvement from the MPU.
Storage for the look-up table is in a dedicated 128 byte NV RAM.
Table 43 shows the I/O RAM registers involved in automatic RTC temperature compensation.
Table 43: I/O RAM Registers for RTC Temperature Compensation
Name Location Rst Wk Dir Description
OSC_COMP
28A0[5]
0 0 R/W
Enables the automatic update of RTC_P and RTC_Q
every time the temperature is measured.
STEMP[10:3]
STEMP[2:0] 2881[7:0]
2882[7:5]
– – R
The result of the temperature measurement (10-bits of
magnitude data plus a sign bit).
The complete STEMP[10:0] value can be read and
shifted right in a single 16-bit read operation as shown
in the following code fragment.
volatile int16_t xdata STEMP _at_0x2881;
fa = (float)(STEMP/32);
LKPADDR[6:0] 2887[6:0] 0 0 R/W The address for reading and writing the RTC lookup RAM.
LKPAUTOI 2887[7] 0 0 R/W
Auto-increment flag. When set, LKPADDR[6:0] auto
increments every time LKP_RD or LKP_WR is pulsed.
The incremented address can be read at
LKPADDR[6:0].
LKPDAT[7:0] 2888[7:0] 0 0 R/W The data for reading and writing the RTC lookup RAM.
LKP_RD
LKP_WR 2889[1]
2889[0] 0
0 0
0 R/W
R/W
Strobe bits for the RTC lookup RAM read and write.
When set, the LKPADDR and LKPDAT registers are
used in a read or write operation. When a strobe is
set, it stays set until the operation completes, at which
time the strobe is cleared and LKPADDR is
incremented if LKPAUTOI is set.