1 analyzer speed, 2 generator/analyzer clocking overrides – Teledyne LeCroy USBTracer_Trainer - Users Manual User Manual

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Chapter 10: Recording Options

USB Protocol Suite User Manual

238

LeCroy Corporation

10.2.1 Analyzer Speed

This option sets the speed of the traffic recorded by the Analyzer. The default setting is
Auto-detect. This setting tells the Analyzer to discover what speed traffic is running and
to label packets accordingly. If you are having problems with your recordings, you might
try setting the traffic speed to one of the fixed values -- Low, Full, and Hi speed. These
settings are used when you want to manually set the traffic speed.

In some rare cases, auto-detection circuitry causes Full Speed devices to fail to
enumerate on plug-in. Changing the Analyzer speed to Full Speed can sometimes solve
this problem.

Setting the speed to one of the fixed values is sometimes useful for debugging purposes.
For example, if a device that is producing numerous errors at a particular speed, you may
wish to set the recording to that speed in order to ensure that the Analyzer does not
misread the error packets and label them the wrong speed. While it is unlikely that the
Analyzer will mislabel packets in this way, manually setting the recording speed
guarantees that the Analyzer always records packets at the correct speed.

Notes on Hi Speed Recordings

Erroneous chirp blocks can be recorded on an idle bus when the Device has its FS
terminations on while the Host has HS terminations connected. This causes a small
differential voltage (“tiny-J”) on the USB bus that causes false Chirp detection.

This condition occurs during speed negotiation:

On a HS bus, the condition is momentary just before the device chirps.

On a CS bus, the condition occurs both before and after the device chirp (until
the end of Reset). The user is discouraged from using Speed=HIGH to record
signals on a classic speed bus.

The Analyzer stops recording anything for 2.5 milliseconds following a FS_K
state (which is at least 2 microseconds long). This is to avoid presenting
“garbage” which is a by-product of the high-speed probe settling down.

10.2.2 Generator/Analyzer Clocking Overrides

Generator/Analyzer Clocking Overrides allows changes to be made to the
Analyzer/generator clocking. Select Slow Clock, then enter a value in the box on the
right. The value that is entered tells the Analyzer how much to divide the base clock by.
For example, entering a 4 causes Full Speed traffic to be generated at a 3-megabit rate
as opposed to the standard 12-megabit rate.

You can use the slow clock selection to slow down the base clock during generation. This
also changes the Analyzer’s clock base to match.

Step 1 In the Misc. USB 2.0 tab, make sure you are out of Auto-Detect mode.

Step 2 Select the Slow Clock checkbox.

Step 3 In the Divide By field, enter a value.

Step 4 Click OK.

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