Anritsu 373XXA - Manual (Page 106)

A8, Source Lock/
Signal Separation
and Control PCB
The Source Lock Phase Comparator circuit on the A8 Source Lock/ Signal
Separation Control PCB compares the Source Lock (Reference A/B) signal
from the Receiver Module with a signal derived from the10 MHz refer-
ence oscillator. The output of this circuit is the –6 MHz/V correction sig-
nal, which is routed to the circuit on the A21A2 Source Control PCB that
generates the FM coil tuning current signal. This signal is output to the
A21A1 YIG/Bias Controller PCB to fine tune the YIG-tuned oscillator to
the exact output frequency. When the YIG-tuned oscillator outputs the
exact frequency, the two inputs to the phase comparator circuit on the A8
PCB match and the phase-lock loop is locked.
The A8 PCB Assembly also provides bias and control signals to the
Test Set and Receiver Modules for operating the following circuits:
q Transfer Switch
q Power Amplifier
q Quad/Sampler Buffer Amplifier
q Front Panel Forward/Reverse LEDs
IF Section The IF Section consists of the items listed below; refer to Figure 7-2.
q A3 Test A IF PCB
q A4, Reference IF PCB
q A5, A/D Converter PCB
q A6, Test B IF PCB
q A7, Third Local Oscillator, LO3, PCB
The IF Section converts the three 2.5 MHz IF signals from the Re-
ceiver Module into six DC output signals. The A3 (Test A), A4 (Refer-
ence A/B), and A6 (Test B) PCBs down-convert the 2.5 MHz input IF
signals to 80 kHz IF signals and then adjust their amplitude for input
to the synchronous detector stage of each PCB. Each 80 kHz IF signal
is synchronously detected and converted into a pair of DC signals that
contain the information for the real and imaginary portions of the
original 80 KHz IF signal. Thus, the three IF signals (two test signals
and the reference signal) yield six DC signals that fully represent the
real and imaginary vector components of the DUT’s S-parameters.
The IF Section also checks the 2.5 MHz phase lock signal for proper
power level by comparing it to a known reference level on the A4 PCB.
A sample of the 2.5 MHz Reference A/B IF signal is sent to the A8
Source Lock/Separation Control PCB assembly for phase locking the
signal source module. The A3 and A6 PCBs are functionally identical
and physically interchangeable.
SYSTEM DESCRIPTION ANALOG SUBSYSTEM ASSEMBLIES
373XXA MM 7-11