Altera Hybrid Memory Cube Controller - Manual (Page 15)

Figure 2-2: Default RX and TX Mapping Parameter Values
FPG A
HMC Controller
Hybrid Memory Cube
hmc_lxtx[0] LxRX[0]
LxTX[0] hmc_lxrx[0]
hmc_lxtx[1] LxRX[1]
LxTX[1] hmc_lxrx[1]
hmc_lxtx[2] LxRX[2]
LxTX[2] hmc_lxrx[2]
hmc_lxtx[3] LxRX[3]
LxTX[3] hmc_lxrx[3]
hmc_lxtx[F] LxRX[F]
LxTX[F] hmc_lxrx[F]
hmc_lxtx[E] LxRX[E]
LxTX[E] hmc_lxrx[E]
hmc_lxtx[D] LxRX[D]
LxTX[D] hmc_lxrx[D]
hmc_lxtx[C] LxRX[C]
LxTX[C] hmc_lxrx[C]
. . . . . . . . .
RX mapping value 0xFEDCBA9876543210
TX mapping value 0xFEDCBA9876543210
If the HMC device
LxTX[<i>]
output signal connects to the HMC Controller IP core
hmc_lxrx[<k>]
input port, the value in bits [(4<i>+3):(4<i>)] (nibble <i>) of the RX mapping parameter is 4'h<k>.
Therefore, the default value of the RX mapping parameter is 0xFEDCBA9876543210, indicating that
LxTX[F]
connects to
hmc_lxrx[F]
,
LxTX[E]
connects to
hmc_lxrx[E]
, and so on.
If the HMC device
LxRX[<i>]
input signal connects to the HMC Controller IP core
hmc_lxtx[<k>]
input
port, the value in bits [(4<i>+3):(4<i>)] (nibble <i>) of the TX mapping parameter is 4'h<k>. Therefore,
the default value of the TX mapping parameter is 0xFEDCBA9876543210, indicating that
LxRX[F]
connects to
hmc_lxtx[F]
,
LxRX[E]
connects to
hmc_lxtx[E]
, and so on.
Example: Non-Default RX Mapping Parameter Value
Table 2-2: Non-Default RX Connections
HMC Device Output Signal IP Core Input Signal
LxTX[2] hmc_lxrx[0]
LxTX[1] hmc_lxrx[2]
LxTX[0] hmc_lxrx[1]
2-6 RX Mapping and TX Mapping Parameters
UG-01152
2015.05.04
Altera Corporation Getting Started with the HMC Controller IP Core
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