Altera Cyclone V GX FPGA Development Board - Manual (Page 26)

2–18 Chapter 2: Board Components
Clock Circuitry
Cyclone V GX FPGA Development Board May 2013 Altera Corporation
Reference Manual
Clock Circuitry
This section describes the board's clock inputs and outputs.
On-Board Oscillators
The development board include oscillators with a frequency of 50-MHz, 100-MHz,
148.50-MHz, and a quad-clock programmable oscillator.
Figure 2–5 shows the default frequencies of all external clocks going to the
Cyclone V GX FPGA development board.
Figure 2–5. Cyclone V GX FPGA Development Board Clocks
SMA SMA
HSMC XVCR x4
SDI x1
CH0 125 MHz
CH2 156.25 MHz
Si5338
x4 LVDS Output
CH1
IN1
IN1
IN2
CH2
CH3
CH1
CH0
CH2
CH3
SL18860DC
Clock Fan-Out
x3 SE
To Bank 4A
USB Clock
48 MHz
IDT5T9306
Clock Fan-Out
x4 LVDS
Si510 SE
50 MHz Fixed
Oscillator
Si510 SE
50 MHz Fixed
Oscillator
25 MHz Fixed
Oscillator
MAX V CPLD
System Controller
Cyclone V GX FPGA
FA-128
24.0 MB-W
24 MHz XTAL
FA-128
24.0 MB-W
24 MHz XTAL
CY7C68013A
USB
Microcontroller
MAX II CPLD
Embedded
USB-Blaster II
10/100/1000
Base-T
Ethernet PHY
88E1111
Bank
2L
Bank
1L
Bank
0L
Bank
6A
Bank
8A
Bank
9A
Bank
7A
Bank
3A
Bank
3B
Bank
4A
Bank
5B
Bank
5A
Si571
LVDS VCXO
148.5 MHz and
148.35 MHz
SMA
LVPECL
Clock Input