Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 50)

50 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
Chapter 5: Core Architecture
AV Traffic R eceiver Path Signals
Table 5-5 defines the core client side AV traffic receiver signals, used by the core to transfer
data to the AV client. All signals are synchronous to the MAC receiver clock, rx_clk,
which must be qualified by the corresponding clock enable, rx_clk_en (see
“Clocks and
Resets” ).
Tri-Mode Ethernet MAC Client Interface
Table 5-6 , Table 5-7 and Table 5-8 list the ports of the core which connect directly to the
port signals of the Tri-Mode Ethernet MAC core, which are identically named. For detailed
information about the Tri-Mode Ethernet MAC ports, see the Tri-Mode Ethernet MAC
User Guide (UG138).
MAC Transmitter Interface
These signals connect directly to the identically named Tri-Mode Ethernet MAC signals
and are synchronous to tx_clk.
Table 5-5: AV Traffic Signals: Receiver Path
Signal Direction Description
av_rx_data[7:0] Output AV frame data received is supplied on this port.
av_rx_valid Output Control signal for the av_rx_data[7:0] port
av_rx_frame_good Output Asserted at the end of frame reception to indicate
that the frame should be processed by the MAC
client.
av_rx_frame_bad Output Asserted at the end of frame reception to indicate
that the frame should be discarded by the MAC
client: either the frame contained an error, or it was
intended for the PTP or legacy traffic channel.
Table 5-6: Tri-Mode Ethernet MAC Transmitter Interface
Signal Direction Description
tx_data[7:0] Output Frame data to be transmitted is supplied on this port
tx_data_valid Output A data valid control signal for data on the
tx_data[7:0]
port
tx_underrun Output Asserted to force the MAC to corrupt the current frame
tx_ack Input Handshaking signal asserted when the current data on
tx_data[7:0]
has been accepted by the MAC.