Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 76)

76 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
Chapter 8: Real Time Clock and Time Stamping
Conceptually, the RTC is not related to the frequency of the clock used to increment it. A
configuration register within the core provides a configurable increment rate for this
counter: this increment register,
“RTC Increment Value Control Register,” is for this reason
simply programmed with the value of the RTC Reference clock period which is being used
to increment the RTC. The resolution of this increment register is very fine (in units of
1/1048576 (1/2
20 ) fraction of one nanosecond). Therefore, the RTC increment rate can be
adjusted to a very fine degree of accuracy. This provides the following features:
•
The RTC can be incremented from any available clock frequency that is greater than
the AVB standards defined minimum of 25 MHz. However, the faster the frequency of
the clock, the smaller will be the step increment and the smoother will be the overall
RTC increment rate. Xilinx recommends clocking the RTC logic at 125 MHz because
this is a readily available clock source (obtained from the transmit clock source of the
Ethernet MAC at 1 Gbps speed): this frequency will significantly exceed the minimum
performance of the P802.1AS specification.
•
When acting as a clock slave, the rate adjustment of the RTC can be matched to that of
the network clock master to an exceptional level of accuracy (by slightly increasing or
decreasing the value within the
“RTC Increment Value Control Register” ). The
software drivers provided with this core will periodically calculate the increment rate
error between itself and the master, and update the RTC increment value accordingly.
The core also contains configuration registers, “RTC Offset Control Registers,” which
allow a large step change to be made to the RTC. This can be used to initialize the RTC,
after power-up. It is also used to make periodic corrections, as required, by the software
drivers when operating as a clock slave: however, if the increment rates are closely
matched, these periodic step corrections will be small.