Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 77)

Ethernet AVB Endpoint User Guide www.xilinx.com 77
UG492 September 21, 2010
Real Time Clock
RTC Implementation
Increment of Nanoseconds Field
Figure 8-2 illustrates the implementation used to create the RTC nanoseconds field. This is
performed by the use of an implementation specific 20-bit sub-nanoseconds field as
illustrated. The nanoseconds and sub-nanoseconds fields can be considered to be
concatenated together.
All RTC logic within the core is synchronous to the RTC Reference Clock, rtc_clk.
X-Ref Target - Figure 8-2
Figure 8-2: Increment of Sub-nanoseconds and Nanoseconds Field
Nano Seconds (32 bits unsigned) Sub-Nano Seconds
(20 bits unsigned)
RTC Increment Value (26 bits)
(written by processor)
fill with zero’s
RTC Nano Seconds Offset (30 bits)
(written by processor)
Step 1
Step 2
controlled frequency RTC
Synchronised RTC