B&K Precision 4034 - Manual - Manual (Page 42)

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is an 8-bit register whose bits correspond to those of the STB. The RQS bit in the STB is set when a bit
in the STB is set, and its corresponding bit in the service request enable register is set.
The service request enable register is set using the *SRE common command, and read using the *SRE?
common query.
4.10.3 Standard Event Status Register
The Standard Event Status Register (SESR) is defined by IEEE 488.2. It is implemented in the pulse
generator as a byte, whose bits have the following definitions:
Bit 0: Operation Complete (OPC). This bit is set in response to the *OPC common command
being executed.
Bit 1: Request Control (RQC). Not implemented in the PG.
Bit 2: Query Error (QYE). This bit is set when either the controller is attempting to read data
from the device when none is available, or when data prepared for the controller to read
has been lost.
Bit 3: Device-Specific Error (DDE). This bit is set to indicate that a device operation did not
execute due to some device condition.
Bit 4: Execution Error (EXE). This bit is set when the device could not execute a command,
due to the command being outside of its capabilities. For example, a parameter being out
of range.
Bit 5: Command Error (CME). This bit is set to indicate an error in the command syntax.
Bit 6: User Request (URQ). This bit is not used by the pulse generator.
Bit 7: Power On (PON). This bit is set when the device is powered on.
The SESR is queried using the *ESR? common query.
The SESR is paired with an enable register, the Standard Event Status Enable Register (SESER). This
register enables one or more events in the SESR to be reflected in the Status Byte ESB summary
message bit. The bits of the SESER correspond to those of the SESR. Setting a bit in the SESER
enables the corresponding event to set the ESB bit when it occurs. The SESER is set with the *ESE
common command and queried with the *ESE? command query.
4.10.4 The Error Queue
The error queue is used to store codes of errors detected in the device. It is implemented as a cyclic
buffer of length 10. When the error queue is not empty, bit EVQ in the Status Byte is set. The error
queue is read with either one of the following two queries:
:SYSTEM:ERROR?
:STATUS:QUEUE:NEXT?
The first error in the queue is returned, and the queue is advanced.
4.10.5 Error Codes
The negative error codes are defined by SCPI. Positive codes are specific to the PG. The error
message is returned in the following form:
<error number>,"<error description>"
A table of error numbers and their descriptions is presented here.
No error reported
0 No error