Status byte register – GW Instek GLC-9000 User Manual User Manual
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GLC-9000 User Manual
156
Status Byte Register
The Status Byte Register contains the summary of the Status
Registers, the status of the output queue and the input buffer as well
as the generation of service requests. Any data in the output buffer
will set the “Message Available bit” (MAV bit, bit 4). Conversely
reading the output buffer will clear the MAV bit.
Clearing any event register will also clear the corresponding bit in
the status byte register. A SRQ (Service request) is generated by
executing the *SRE command with a bit weight.
Bit Summary- Status Byte Register
Bit Position
Bit
Weight Description
0 Unused
1
Unused, returns “0”
1 Unused
2
Unused, returns “0”
2 Error Queue
4
This bit is set if there is data in the
Error Queue
3 Questionable
data
8
Summary of the Questionable Data
Register
4 Message
available
16
Shows that the output queue contains
at least one message.
5 Standard
Event
Summary
32
Summary of the Standard Event Status
Register.
6 Request
Service
64
The Request Service Register is the
logical sum of all the enabled bits of
the Status Byte Register, excluding its
own.
7 Unused
128
Unused, returns “0”