An368 – Cirrus Logic AN368 User Manual
Page 19
AN368
AN368REV2
19
The FBAUX pin current must be limited to less than 1mA. Resistor R22 plus resistor R23 should be chosen
such that current V
AUX
/(R22 + R23) is less than 1mA during the time when FET Q5 is ‘ON’ or ‘OFF’. A series
resistor of at least 22k
must be used to limit the current. Bit VALLEYSW in register Config2 at Address 34
configures the quasi-resonant switching (valley switching) on the second stage. To enable valley switching,
set bit VALLEYSW to ‘1’. Bit POL_ZCD in register Config4 at Address 36 configures the polarity of the zero-
current detection comparator output. It is recommended to set the ZCD comparator output to active-low by
setting bit POL_ZCD to ‘0’.
k. Determine Output Capacitors
The flyback output capacitors must provide a low impedance to the switching frequency. When using an
electrolytic capacitor, the choice is based on its ability to carry the ripple current so that it provides a long
service life. A capacitor that fulfills the ripple, voltage, temperature, and life requirements results in a capacitor
with a large capacitance that is often much greater than what is necessary to smooth the load current. In
flyback applications, the voltage ripple across the output electrolytic capacitor is determined mostly by the ESR
rather than the reactance.
l. Flyback Transformer Design
The following information is now available:
1. Maximum peak currents through the primary
2. Inductance
3. Turns ratio
4. RMS current through the winding
The core can be chosen using the transformer core data sheet, K
g
constant, or the area product. After
selecting the core, the gap and the number of turns can be calculated using Equations 34, 35, and 36.
The air gap length l
g
is calculated using Equation 34:
where,
o
= Permittivity of free space = 4
x 10
-7
H/m
A
e
= Effective cross-sectional area of the core in mm
2
B
PK
= Peak flux density in Tesla
L
P
= Primary inductance in Henry
The primary turns N
P
is calculated using Equation 35:
The secondary turns N
S
is calculated using Equation 36:
Both N
S
and N
P
have to be an integer. Therefore, the actual flyback transformer turns ratio N may be
marginally different from the theoretical calculations. Hence the inductance needs to be re-calculated in order
to maintain the desired frequency spectrum. Circuit adjustments are required after the transformer has been
designed and constructed. Optimum efficiency, at full brightness, is obtained when the system is switching as
close to CRM as possible and turning on the first valley as illustrated in Figure 5. The ZCD delay can be
adjusted to hit the valley accurately, and this is demonstrated in Step 5b Tune Flyback ZCD Fixed Delays for
Optimum Valley-switching Performance on page 25.
[Eq. 34]
l
g
0.5
o
L
P
I
PK1 FB
2
B
PK
2
A
e
--------------------------
=
[Eq. 35]
N
P
L
P
I
PK1 FB
B
PK
A
e
---------------------
=
N
S
N
P
N
-------
=
[Eq. 36]