Cirrus Logic AN368 - Manual (Page 43)

AN368
AN368REV2 43
4. Configure the threshold for the OLP event accumulator used to declare an OLP fault. Bits
OLP_CNT[2:0] in register Config49 at Address 81 are used to configure the threshold. If the voltage on
pin FBSENSE does not exceed 200mV within 250ns after the second-stage gate drive turns ‘ON’ and
the OLP blanking time elapsed, then the OLP event accumulator is incremented by 1, and the gate drive
is disabled. If the voltage applied to pin FBSENSE exceeds 200mV within this time frame the OLP event
accumulator is decremented by 1. Once the accumulator count exceeds or equals the threshold set by
bits OLP_CNT[2:0], then an OLP fault is declared, and the system enters a fault state. Hence, the value
defined by bits OLP_CNT[2:0] sets the minimum number of consecutive second-stage gate drive
switching cycles that encountered an OLP event declaring a system OLP fault. The OLP event
accumulator is required to assist in preventing the system from declaring a fault due to glitches and
random noise. When an OLP fault is declared, the fault behavior during the fault state is determined by
bit FAULT_SHDN (see Step 15a Protection Restart).
d. Overvoltage Protection
Output open circuit protection and output overvoltage protection (OVP) are designed to detect when the output
voltage exceeds a specified threshold due to an open circuit on either output channel. During switching time
T2, the voltage across the flyback transformer T1 auxiliary winding is representative of the output voltage using
a turns ratio relationship. Overvoltage protection is implemented by monitoring the output voltage through the
flyback transformer T1 auxiliary winding. The voltage applied to pin FBAUX is fed to a comparator and
measured against a threshold voltage V
OVP(th)
of 1.25V. The comparator output is monitored using a digital
algorithm that detects OVP events using the OTP settings configured in the steps below:
1. The OVP feature is enabled when bit OVP is set to ‘0’. Bit OVP is bit 5 in register Config47 at Address
79.
2. Configure OVP faults to be of type unlatched or latched. Set bit OVP_LAT to ‘1’ for latched faults. Bit
OVP_LAT is bit 4 in register Config50 at Address 82. Unlatched OVP faults are cleared and restarted
using the configuration in Step 15a Protection Restart. Latched OVP faults are not cleared until the
power to the IC is recycled.
3. Configure the OVP blanking time using bit OVP_TYPE and bits OVP_BLANK[2:0] in register Config50
at Address 82. Bit OVP_TYPE selects between a fixed blanking time where the time duration is
configured using bits OVP_BLANK[2:0] or that channel’s previous switching period T2
CHx
to define the
offset blanking time. When bit OVP_TYPE is set to ‘0’ the OVP blanking time starts at the falling edge
of the gate drive and lasts for a fixed blanking time t
OVP
:
When bit OVP_TYPE is set to ‘1’ the OVP blanking time starts at the falling edge of the gate drive and
lasts for a fixed blanking time equal to the channel’s previous switching period T2
CHx
minus 500ns. After
the blanking window elapses, the digital process waits 250ns to allow the digital algorithm to scan for
an OVP event. During this time if the comparator circuit detects an event the gate drive is disabled, and
an OVP fault is logged. If the blanking window is configured to be too long, the power converter may not
be properly protected, and if the blanking window is too short, a false OVP fault may be logged.
4. Configure the threshold for the OVP event accumulator used to declare an OVP fault. Bits
OVP_CNT[2:0] in register Config50 at Address 82 are used to configure the threshold. If the voltage on
pin FBAUX exceeds 1.25V after the time the second-stage gate drive turns ‘OFF’ and outside of the
OVP blanking window, then the OVP event accumulator is incremented by 1 before the start of the next
switching cycle. If an OVP event does not occur during this time, the event accumulator is decremented
by 1. Once the accumulator count exceeds or equals the threshold set by bits OVP_CNT[2:0] then an
OVP fault is declared, and the system enters a fault state. Hence, the value defined by bits
OVP_CNT[2:0] sets the minimum number of consecutive second-stage gate drive switching cycles that
encountered an OVP event declaring a system OVP fault. The OVP event accumulator is required to
assist in preventing the system from declaring a fault due to glitches and random noise. When an OVP
fault is declared the fault behavior during the fault state is determined by bit FAULT_SHDN (see Step
15a Protection Restart on page 41).
t
OVP
1 s OVP_BLANK  + [2:0] 0.5 s  
= [Eq. 70]