Cirrus Logic AN368 - Manual (Page 45)

AN368
AN368REV2 45
h. Clamp Overpower Protection
Clamp overpower protection (COP) is designed to detect when the boost voltage exceeds a specified
threshold. Clamp overpower protection is implemented by monitoring the boost output voltage applied to the
bulk capacitor connected to the boost output. The voltage applied to pin BSTOUT is measured against a
programmable threshold voltage V
BOP(th)
. The measured output is monitored using a digital algorithm that
detects COP events using the OTP settings configured in the steps below:
1. The clamp overpower protection feature is enabled when bit COP is set to ‘0’. Bit COP is bit 3 in register
Config47 at Address 79.
2. Configure the time interval to check for a boost stage COP fault. Set bit COP_INT in register Config52
at Address 84 to ‘0’ for a 1-second interval or to ‘1’ for a 2-second interval.
3. Configure the COP filter threshold using bits COP_THRES[6:0] in register Config52 at Address 84. The
clamp is sampled every 20 s and over the selected interval is compared to COP time-on threshold
T
ON(th)
to determine if a COP fault has occurred. For a 1-second interval, use Equation 72:
and for a 2-second interval, use Equation 73:
i. Link Line Protection
Link line protection (LLP) is designed to detect when the boost voltage exceeds a specified threshold. LLP
condition indicates a collapsed boost output voltage, possibly the result of an overcurrent in the flyback stage.
Boost overvoltage protection is implemented by monitoring the boost output voltage applied to the bulk
capacitor connected to the boost output. The voltage applied to pin BSTOUT is measured against a
programmable threshold voltage V
LLPMin(th)
. The measured output is monitored using a digital algorithm that
detects LLP events using the OTP settings configured in the steps below:
1. The LLP feature is enabled when bit LLP is set to ‘0’. Bit LLP is bit 2 in register Config47 at Address 79.
2. Set the time that the condition (V
BST
< (V
Line
- V
LLPMin(th)
)) is true to actuate a boost LLP fault. The
minimum threshold voltage V
LLPMin(th)
is configured using bits BST_LLP[1:0] in register Config62 at
Address 94.
The time to actuate an LLP event is set using bits LLP_TIME[2:0] in register Config54 at Address 86.
BST_LLP[1:0] V
LLPMin(th)
0 80V
1 40V
2 20V
3 10V
Table 3. Threshold Voltage V
LLPMin(th)
LLP_TIME[2:0] Offset Delay
0 0ms
1 1ms
2 2ms
3 2.5ms
4 3ms
5 3.5ms
6 400ms
7 5ms
Table 4. Time to Actuate LLP
T
ON th  
COP_THRES  [6:0] 5.12ms  2.56ms + 
=
[Eq. 72]
T
ON th  
COP_THRES  [6:0] 10.24ms  5.12ms +  = [Eq. 73]