BECKHOFF ET1200 - Manual (Page 54)

SII EEPROM Interface (I²C)
III-44 Slave Controller – ET1200 Hardware Description
8 SII EEPROM Interface (I²C)
For details about the ESC SII EEPROM Interface refer to Section I. The SII EEPROM Interface is
intended to be a point-to-point interface between ET1200 and I²C EEPROM. If other I²C masters are
required to access the I²C bus, the ET1200 must be held in reset state (e.g. for in-circuit-programming
of the EEPROM), otherwise access collisions will be detected by the ET1200.
8.1 Signals
The EEPROM interface of the ET1200 has the following signals:
EtherCAT
device
EEPROM_DATA
EEPROM_CLK
EEPROM_SIZE
Figure 22: I²C EEPROM signals
Table 46: I²C EEPROM signals
Signal Direction Description
EEPROM_CLK OUT I²C clock
EEPROM_DATA BIDIR I²C data
EEPROM_SIZE IN EEPROM size configuration
The pull-up resistors for EEPROM_CLK and EEPROM_DATA are integrated into the ET1200.
EEPROM_CLK must not be held low externally, because the ET1200 will detect this as an error.
8.2 Timing specifications
Table 47: EEPROM timing characteristics
Parameter
Typical
Comment
1 Kbit-16 Kbit 32 Kbit-4 Mbit
t
Clk
~ 6.72 µs EEPROM clock period (f
Clk
≈ 150 kHz)
t
Write
~ 250 us ~ 310 µs Write access time (without errors)
t
Read
a) ~ 680 µs
b) ~ 1.16 ms a) ~ 740 µs
b) ~ 1.22 ms Read access time (without errors):
a) 4 words
b) configuration (8 Words)
t
Delay
~ 168 ms Time until configuration loading begins after
Reset is gone