Comtech EF Data CDM-550T - Manual (Page 9)

CDM-550T Satellite Modem Revision 3
Table of Contents MN/CDM550T.IOM
7.2 Viterbi ............................................................................................................................ 7–1
7.3 Sequential....................................................................................................................... 7–2
7.4 Reed-Solomon Outer Codec (Option) ......................................................................... 7–3
7.5 Turbo Product Codec (Option).................................................................................... 7–4
7.5.1 End-to-End Processing Delay ..................................................................................... 7–5
7.6 Uncoded Operation (No FEC) ..................................................................................... 7–6
CHAPTER 8. OFFSET QPSK OPERATION ............................................................ 8–1
CHAPTER 9. RS-232 DATA INTERFACE - ASYNCHRONOUS OPERATION ...... 9–1
9.1 Introduction ................................................................................................................... 9–1
9.2 ASYNC EIA-232 Specifications ................................................................................... 9–1
9.3 Setup ............................................................................................................................... 9–1
9.4 Other Considerations.................................................................................................... 9–2
9.4.1 Baud Rate Accuracy ................................................................................................... 9–2
9.4.2 Async Character Formats Using 1.5 Stop Bits ........................................................... 9–2
CHAPTER 10. CLOCKING MODES ...................................................................... 10–1
10.1 Overview ...................................................................................................................... 10–1
10.2 Transmit Clocking ...................................................................................................... 10–1
10.2.1 Internal Clock........................................................................................................ 10–1
10.2.2 External Clock ...................................................................................................... 10–1
10.2.3 Loop-Timed, RX=TX ........................................................................................... 10–1
10.2.4 Loop-Timed, RX<>TX (Asymmetric Loop Timing) ........................................... 10–2
10.3 Receive Clocking ......................................................................................................... 10–2
10.3.1 Buffer Disabled ..................................................................................................... 10–2
10.3.2 Buffer Enabled, RX=TX ....................................................................................... 10–2
10.3.3 Buffer Enabled, RX<>TX ..................................................................................... 10–2
10.4 X.21 Notes .................................................................................................................... 10–2
10.5 Loop Timing with Sync RS-232 ................................................................................. 10–2
CHAPTER 11. EDMAC CHANNEL ........................................................................ 11–1
11.1 Theory of Operation ................................................................................................... 11–1
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