Crc data (crcd), Registers: 0xe4–0xe7 – Avago Technologies LSI53C1010R User Manual
Page 241
SCSI Registers
4-123
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
CRCDSEL
CRC Data Register Selector
[1:0]
These bits control the data that is visible in the CRC Data
(CRCDATA) register.
Registers: 0xE4–0xE7
CRC Data (CRCD)
Read/Write
The value in this register is dependent on the setting of the CRCDSEL
bits in the
register.
Note:
Data written to this register may not be available for
immediate read back due to synchronization between the
PCI and SCSI clock domains. After a write, wait at least
16 PCI clock cycles before reading this register.
CRCD
CRC Data
[31:0]
If CRCDSEL = 0b00, this register represents the current
CRC value. After sending data during the DT Data-Out
phase, this register contains the CRC calculation for that
data, if no CRC request occurred during the transfer. In
this mode, this register is read only.
If CRCDSEL = 0b01, this register represents the CRC
Input register and contains its current value. It normally
contains the SCSI data transferred to or from the SCSI
bus during a DT transfer phase. In this mode, this register
can be written to in order to manually alter the input data
used for CRC calculation. For normal operations, this
register should never be written to.
If CRCDSEL = 0b10, this register represents the CRC
Accumulator and contains its current value. In this mode,
this register can be written to in order to manually modify
the value in the accumulator. This register should not be
written to during normal operation as corrupt CRC
values result.
31
0
CRCD
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x