Avago Technologies LSI53C1010R - Manual (Page 97)

Signal Organization 3-3
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Figure 3.1 LSI53C1010R Functional Signal Grouping
CLK
RST/
AD[63:0]
C_BE[7:0]/
PAR
PAR64
ACK64/
REQ64/
FRAME/
TRDY/
IRDY/
STOP/
DEVSEL/
IDSEL
REQ/
GNT/
PERR/
SERR/
INTA/
INTB/
ALT_INTA/
ALT_INTB/
A_GPIO0
A_GPIO1
A_GPIO2
A_GPIO3
A_GPIO4
B_GPIO0
B_GPIO1
B_GPIO2
B_GPIO3
B_GPIO4
MWE/
MCE/
MOE/
MAS0/
MAS1/
MAD[7:0]
SCLK
A_SD[15:0]
±
A_SDP[1:0]
±
A_SCD
±
A_SIO
±
A_SMSG
±
A_SREQ
±
A_SBSY
±
A_SATN
±
A_SRST
±
A_SSEL
±
B_SDP[1:0]
±
B_SCD
±
B_SIO
±
B_SMSG
±
B_SREQ
±
B_SBSY
±
B_SATN
±
B_SRST
±
B_SSEL
±
B_SD[15:0]
±
TEST_RST/
TEST_HSC
TCK_ CHIP
TMS_CHIP
TDI_CHIP
TDO_CHIP
B_DIFFSENS
A_DIFFSENS
LSI53C1010R
SCSI
Function
A
SCSI
Function
B
Test
Interface
SCSI
Bus
Interface
System
Address
and
Data
Interface
Control
Arbitration
Error
Reporting
Interrupt
SCSI
Function
A
GPIO
SCSI
Function
B
GPIO
Flash
ROM
and
Memory
Interface
PCI
Bus
Interface
A_SCTRL/
B_SCTRL/
A_SACK
±
B_SACK
±
SCAN_MODE
ENABLE66
M66EN
SCANEN
IDDTN