Avago Technologies LSI53C1010R - Manual (Page 302)

6-12 Specifications
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Figure 6.9 Reset Input
Table 6.16 and Figure 6.10 provide Interrupt Output timing data.
Figure 6.10 Interrupt Output
Table 6.15 Reset Input
Symbol Parameter Min Max Unit
t
1
Reset pulse width 10 – t
CLK
t
2
Reset deasserted setup to CLK HIGH 0 – ns
t
3
MAD setup time to CLK HIGH (for configuring
the MAD bus only) 20 – ns
t
4
MAD hold time from CLK HIGH (for configuring
the MAD bus only) 20 – ns
t
1
t
2
t
3
t
4
CLK
RST/
MAD*
*When enabled
Valid
Data
Table 6.16 Interrupt Output
Symbol Parameter Min Max Unit
t
1
CLK HIGH to IRQ/ LOW 2 11 ns
t
2
CLK HIGH to IRQ/ HIGH 2 11 ns
t
3
IRQ/ deassertion time 3 – CLK
t
1
t
2
IRQ/
CLK
t
3