Avago Technologies LSI53C1010R User Manual
Page 278
5-30
SCSI SCRIPTS Instruction Set
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Call Instruction
The LSI53C1010R can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields. If the comparisons are true, it loads
the
register with the
contents of the
DMA SCRIPTS Pointer Save (DSPS)
register, and that address value becomes the address of
the next instruction.
When the LSI53C1010R executes a Call instruction, the
instruction pointer contained in the
register is stored in the
register. Because the TEMP register
is not a stack and can only hold one Dword, nested call
instructions are not allowed.
If the comparisons are false, the LSI53C1010R fetches
the next instruction from the address pointed to by the
register, and the instruc-
tion pointer is not modified.
Return Instruction
The LSI53C1010R can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields. If the comparisons are true, it loads
the
register with the
contents of the
DMA SCRIPTS Pointer Save (DSPS)
register. That address value becomes the address of the
next instruction.
When a Return instruction is executed, the value stored
in the
register is returned to the
register. The
LSI53C1010R does not check to see whether the Call
instruction has already been executed. It does not
generate an interrupt if a Return instruction is executed
without previously executing a Call instruction.
If the comparisons are false, the LSI53C1010R fetches
the next instruction from the address pointed to by the
register and the instruction
pointer is not modified.