Document Outline

• 1 Introduction
• 2 Hardware Description
  • 2.1 Hardware Overview
  • 2.2 Analog Front End (AFE)
    • 2.2.1 Signal Input Pins
    • 2.2.2 Input Multiplexer
    • 2.2.3 Delay Compensation
    • 2.2.4 ADC Pre-Amplifier
    • 2.2.5 A/D Converter (ADC)
    • 2.2.6 FIR Filter
    • 2.2.7 Voltage References
    • 2.2.8 71M6x01 Isolated Sensor Interface (Remote Sensor Interface)
      • 2.2.8.1 General Description
      • 2.2.8.2 Communication between 71M654x and 71M6x01 Isolated Sensor
      • 2.2.8.3 Control of the 71M6x01 Isolated Sensor
  • 2.3 Digital Computation Engine (CE)
    • 2.3.1 CE Program Memory
    • 2.3.2 CE Data Memory
    • 2.3.3 CE Communication with the MPU
    • 2.3.4 Meter Equations
    • 2.3.5 Real-Time Monitor (RTM)
    • 2.3.6 Pulse Generators
      • 2.3.6.1 XPULSE and YPULSE
      • 2.3.6.2 VPULSE and WPULSE
    • 2.3.7 CE Functional Overview
  • 2.4 80515 MPU Core
    • 2.4.1 Memory Organization and Addressing
      • Program Memory
      • MPU External Data Memory (XRAM)
      • Internal and External Memory Map
      • MOVX Addressing
      • Dual Data Pointer
      • Internal Data Memory Map and Access
    • 2.4.2 Special Function Registers (SFRs)
    • 2.4.3 Generic 80515 Special Function Registers
      • Accumulator (ACC, A, SFR 0x E0):
      • B Register (SFR 0xF0):
      • Program Status Word (PSW, SFR 0xD0 ):
      • Stack Pointer (SP, SFR 0x81):
      • Data Pointer:
      • Program Counter:
      • Port Registers:
      • Clock Stretching (CKCON)
    • 2.4.4 Instruction Set
    • 2.4.5 UARTs
      • UART Control Registers:
    • 2.4.6 Timers and Counters
    • 2.4.7 WD Timer (Software Watchdog Timer)
    • 2.4.8 Interrupts
      • Interrupt Overview
      • Special Function Registers for Interrupts
      • External MPU Interrupts
      • Interrupt Priority Level Structure
      • Interrupt Sources and Vectors
  • 2.5 On-Chip Resources
    • 2.5.1 Physical Memory
      • 2.5.1.1 Flash Memory
      • 2.5.1.2 MPU/CE RAM
      • 2.5.1.3 I/O RAM (Configuration RAM)
    • 2.5.2 Oscillator
    • 2.5.3 PLL and Internal Clocks
    • 2.5.4 Real-Time Clock (RTC)
      • 2.5.4.1 RTC General Description
      • 2.5.4.2 Accessing the RTC
      • 2.5.4.3 RTC Rate Control
      • 2.5.4.4 RTC Temperature Compensation
      • 2.5.4.5 RTC Interrupts
    • 2.5.5 71M654x Temperature Sensor
    • 2.5.6 71M654x Battery Monitor
    • 2.5.7 UART and Optical Interface
    • 2.5.8 Digital I/O and LCD Segment Drivers
      • 2.5.8.1 General Information
      • 2.5.8.2 Digital I/O for the 71M6541D/F
      • 2.5.8.3 Digital I/O for the 71M6542F
      • 2.5.8.4 LCD Drivers
      • LCD Drivers (71M6541D/F)
      • LCD Drivers (71M6542F)
    • 2.5.9 EEPROM Interface
      • 2.5.9.1 Two-pin EEPROM Interface
      • 2.5.9.2 Three-wire (µ-Wire) EEPROM Interface with Single Data Pin
      • 2.5.9.3 Three-wire (µ-Wire/SPI) EEPROM Interface with Separate Di/DO Pins
    • 2.5.10 SPI Slave Port
    • 2.5.11 Hardware Watchdog Timer
    • 2.5.12 Test Ports (TMUXOUT and TMUX2OUT Pins)
• 3 Functional Description
  • 3.1 Theory of Operation
  • 3.2 Battery Modes
    • 3.2.1 BRN Mode
    • 3.2.2 LCD Mode
    • 3.2.3 SLP Mode
  • 3.3 Fault and Reset Behavior
    • 3.3.1 Events at Power-Down
    • 3.3.2 IC Behavior at Low Battery Voltage
    • 3.3.3 Reset Sequence
    • 3.3.4 Watchdog Timer Reset
  • 3.4 Wake Up Behavior
    • 3.4.1 Wake on Hardware Events
    • 3.4.2 Wake on Timer
  • 3.5 Data Flow and MPU/CE Communication
• 4 Application Information
  • 4.1 Connecting 5 V Devices
  • 4.2 Direct Connection of Sensors
  • 4.3 71M6541D/F Using Local Sensors
  • 4.4 71M6541D/F Using 71M6x01and Current Shunts
  • 4.5 71M6542F Using Local Sensors
  • 4.6 71M6542F Using 71M6x01 and Current Shunts
  • 4.7 Metrology Temperature Compensation
    • 4.7.1 Voltage Reference Precision
    • 4.7.2 Temperature Coefficients for the 71M654x
    • 4.7.3 Temperature Compensation for VREF with Local Sensors
    • 4.7.4 Temperature Compensation for VREF with Remote Sensor
  • 4.8 Connecting I2C EEPROMs
  • 4.9 Connecting Three-Wire EEPROMs
  • 4.10 UART0 (TX/RX)
  • 4.11 Optical Interface (UART1)
  • 4.12 Connecting the Reset Pin
  • 4.13 Connecting the Emulator Port Pins
  • 4.14 Flash Programming
    • 4.14.1 Flash Programming via the ICE Port
    • 4.14.2 Flash Programming via the SPI Port
  • 4.15 MPU Firmware Library
  • 4.16 Crystal Oscillator
  • 4.17 Meter Calibration
• 5 Firmware Interface
  • 5.1 I/O RAM Map –Functional Order
  • 5.2 I/O RAM Map – Alphabetical Order
  • 5.3 CE Interface Description
    • 5.3.1 CE Program
    • 5.3.2 CE Data Format
    • 5.3.3 Constants
    • 5.3.4 Environment
    • 5.3.5 CE Calculations
    • 5.3.6 CE Front End Data (Raw Data)
    • 5.3.7 FCE Status and Control
    • 5.3.8 CE Transfer Variables
      • 5.3.8.1 Fundamental Energy Measurement Variables
      • 5.3.8.2 Instantaneous Energy Measurement Variables
    • 5.3.9 Pulse Generation
    • 5.3.10 Other CE Parameters
    • 5.3.11 CE Calibration Parameters
    • 5.3.12 CE Flow Diagrams
• 6 Electrical Specifications
  • 6.1 Absolute Maximum Ratings
  • 6.2 Recommended External Components
  • 6.3 Recommended Operating Conditions
  • 6.4 Performance Specifications
    • 6.4.1 Input Logic Levels
    • 6.4.2 Output Logic Levels
    • 6.4.3 Battery Monitor
    • 6.4.4 Temperature Monitor
    • 6.4.5 Supply Current
    • 6.4.6 V3P3D Switch
    • 6.4.7 Internal Power Fault Comparators
    • 6.4.8 2.5 V Voltage Regulator – System Power
    • 6.4.9 2.5 V Voltage Regulator – Battery Power
    • 6.4.10 Crystal Oscillator
    • 6.4.11 Phase-Locked Loop (PLL)
    • 6.4.12 LCD Drivers
    • 6.4.13 VLCD Generator
    • 6.4.14 VREF
    • 6.4.15 ADC Converter
    • 6.4.16 Pre-Amplifier for IAP-IAN
  • 6.5 Timing Specifications
    • 6.5.1 Flash Memory
    • 6.5.2 SPI Slave
    • 6.5.3 EEPROM Interface
    • 6.5.4 RESET Pin
    • 6.5.5 RTC
  • 6.6 Package Outline Drawings
    • 6.6.1 64-Pin LQFP Outline Package Drawing
    • 6.6.2 100-Pin LQFP Package Outline Drawing
  • 6.7 Pinout Diagrams
    • 6.7.1 71M6541D/F LQFP-64 Package Pinout
    • 6.7.2 71M6542F LQFP-100 Package Pinout
  • 6.8 Pin Descriptions
    • 6.8.1 Power and Ground Pins
    • 6.8.2 Analog Pins
    • 6.8.3 Digital Pins
    • 6.8.4 I/O Equivalent Circuits
• 7 Ordering Information
  • 7.1 71M6541D/F and 71M6542F
• 8 Related Information
• 9 Contact Information
• Appendix A: Acronyms
• Appendix B: Revision History