Altera Internal Memory (RAM and ROM) IP Core - Manual (Page 43)

Parameter Legal Values Description
More Options
‘address’ port On/Off Specifies whether the
‘address’ port should be
affected by the ‘aclr’ port.
‘q’ port On/Off Specifies whether the ‘q’ port
should be affected by the
‘aclr’ port.
Create a ‘rden’ read enable signal On/Off Specifies whether to create a
read enable signal.
Parameter Settings: Mem Init
Do you want to specify the initial content of the
memory?
Yes, use this file for
the memory content
data
Specifies the initial content
of the memory.
In ROM mode you must
specify a memory initializa‐
tion file (.mif) or a hexadec‐
imal (Intel-format) file (.hex)
. The Yes, use this file for
the memory content data
option is turned on by
default.
Allow In-System Memory Content Editor to
capture and update content independently of the
system clock
On/Off Specifies whether to allow
In-System Memory Content
Editor to capture and update
content independently of the
system clock
The ‘Instance ID’ of this ROM is — Specifies the ROM ID.
ROM: 2-PORT IP Core Parameters
This table lists the ROM: 2-PORT IP Core parameters.
Table 4-5: ROM: 2-PORT IP Core Parameters
Parameter Legal Values Description
Parameter Settings: Widths/Blk Type
How do you want to specify the memory size?
• As a number of
words
• As a number of
bits
Determines whether to
specify the memory size in
words or bits.
How many <X>-bit words of memory? 32, 64, 128, 256, 512,
1024, 2048, 4096,
8192, 16384, 32768,
65536
Specifies the number of <X>-
bit words.
4-18 ROM: 2-PORT IP Core Parameters
UG-01068
2014.12.17
Altera Corporation Embedded Memory Signals and Parameters
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