Supported memory operation modes, Supported memory operation modes -2 – Altera Internal Memory (RAM and ROM) IP Core User Manual

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Supported Memory Operation Modes

This table lists the supported memory operation mode and the related IP core for each operation mode.

Table 1-2: Supported Memory Operation Modes

Memory Operation Mode

Related IP Core

Description

Single-port RAM

RAM: 1-PORT IP

Core

Single-port mode supports non-simultaneous read and write

operations from a single address.
Use the read enable port to control the RAM output ports

behavior during a write operation:
• To show either the new data being written or the old data

at that address, activate the read enable during a write

operation.

• To retain the previous values that are held during the

most recent active read enable, perform the write

operation with the read enable port deasserted.

Simple dual-port

RAM

RAM: 2-PORT IP

Core

You can simultaneously perform one read and one write

operations to different locations where the write operation

happens on port A and the read operation happens on port

B.

True dual-port RAM RAM: 2-PORT IP

Core

You can perform any combination of two port operations:
• two reads, two writes, or,

• one read and one write at two different clock frequencies.

Single-port ROM

ROM: 1-PORT IP

Core

Only one address port is available for read operation.
You can use the memory blocks as a ROM.
• Initialize the ROM contents of the memory blocks using

a .mif or .hex file.

• The address lines of the ROM are registered.

• The outputs can be registered or unregistered.

• The ROM read operation is identical to the read

operation in the single-port RAM configuration.

Dual-port ROM

ROM: 2-PORT IP

Core

The dual-port ROM has almost similar functional ports as

single-port ROM. The difference is dual-port ROM has an

additional address port for read operation.
You can use the memory blocks as a ROM.
• Initialize the ROM contents of the memory blocks using

a .mif or .hex file.

• The address lines of the ROM are registered.

• The outputs can be registered or unregistered.

• The ROM read operation is identical to the read

operation in the single-port RAM configuration.

1-2

Supported Memory Operation Modes

UG-01068

2014.12.17

Altera Corporation

About RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT IP Cores

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