Altera Cyclone IV GX FPGA Development Board - Manual (Page 39)

Chapter 2: Board Components 2–31
Components and Transceiver Interfaces
May 2013 Altera Corporation Cyclone IV GX FPGA Development Board
Reference Manual
J1.38 JTAG data input HSMA_JTAG_TDI
2.5-V
—
J1.39 Dedicated CMOS clock out HSMA_CLK_OUT0 —
J1.40 Dedicated CMOS clock in HSMA_CLK_IN0 —
J1.41 Dedicated CMOS I/O bit 0 HSMA_D0 AC27
J1.42 Dedicated CMOS I/O bit 1 HSMA_D1 Y27
J1.43 Dedicated CMOS I/O bit 2 HSMA_D2 AF30
J1.44 Dedicated CMOS I/O bit 3 HSMA_D3 AD27
J1.47 LVDS TX bit 0 or CMOS bit 4 HSMA_TX_D_P0
LVDS or 2.5-V or
1.8-V
C29
J1.48 LVDS RX bit 0 or CMOS bit 5 HSMA_RX_D_P0 D29
J1.49 LVDS TX bit 0n or CMOS bit 6 HSMA_TX_D_N0 C30
J1.50 LVDS RX bit 0n or CMOS bit 7 HSMA_RX_D_N0 D30
J1.53 LVDS TX bit 1 or CMOS bit 8 HSMA_TX_D_P1 E27
J1.54 LVDS RX bit 1 or CMOS bit 9 HSMA_RX_D_P1 G26
J1.55 LVDS TX bit 1n or CMOS bit 10 HSMA_TX_D_N1 E28
J1.56 LVDS RX bit 1n or CMOS bit 11 HSMA_RX_D_N1 G27
J1.59 LVDS TX bit 2 or CMOS bit 12 HSMA_TX_D_P2 F26
J1.60 LVDS RX bit 2 or CMOS bit 13 HSMA_RX_D_P2 N24
J1.61 LVDS TX bit 2n or CMOS bit 14 HSMA_TX_D_N2 F27
J1.62 LVDS RX bit 2n or CMOS bit 15 HSMA_RX_D_N2 M25
J1.65 LVDS TX bit 3 or CMOS bit 16 HSMA_TX_D_P3 F30
J1.66 LVDS RX bit 3 or CMOS bit 17 HSMA_RX_D_P3 N25
J1.67 LVDS TX bit 3n or CMOS bit 18 HSMA_TX_D_N3 E30
J1.68 LVDS RX bit 3n or CMOS bit 19 HSMA_RX_D_N3 M26
J1.71 LVDS TX bit 4 or CMOS bit 20 HSMA_TX_D_P4 F28
J1.72 LVDS RX bit 4 or CMOS bit 21 HSMA_RX_D_P4 R24
J1.73 LVDS TX bit 4n or CMOS bit 22 HSMA_TX_D_N4 F29
J1.74 LVDS RX bit 4n or CMOS bit 23 HSMA_RX_D_N4 P25
J1.77 LVDS TX bit 5 or CMOS bit 24 HSMA_TX_D_P5 H30
J1.78 LVDS RX bit 5 or CMOS bit 25 HSMA_RX_D_P5 N27
J1.79 LVDS TX bit 5n or CMOS bit 26 HSMA_TX_D_N5 G30
J1.80 LVDS RX bit 5n or CMOS bit 27 HSMA_RX_D_N5 N28
J1.83 LVDS TX bit 6 or CMOS bit 28 HSMA_TX_D_P6 G28
J1.84 LVDS RX bit 6 or CMOS bit 29 HSMA_RX_D_P6 M29
J1.85 LVDS TX bit 6n or CMOS bit 30 HSMA_TX_D_N6 G29
J1.86 LVDS RX bit 6n or CMOS bit 31 HSMA_RX_D_N6 M30
J1.89 LVDS TX bit 7 or CMOS bit 32 HSMA_TX_D_P7 J29
J1.90 LVDS RX bit 7 or CMOS bit 33 HSMA_RX_D_P7 N29
J1.91 LVDS TX bit 7n or CMOS bit 34 HSMA_TX_D_N7 J30
Table 2–33. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference
Description
Schematic Signal
Name
I/O Standard
Cyclone IV GX
Device
Pin Number