Figure 4-23. sisource signal timing, Scanclk signal, Figure 4-24. scanclk signal timing – National Instruments AT E Series User Manual

Page 87: Scanclk signal -40

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Chapter 4

Connecting Signals

AT E Series User Manual

4-40

ni.com

Either the 20 MHz or 100 kHz internal timebase generates the SISOURCE
signal unless you select some external source. Figure 4-23 shows the
timing requirements for the SISOURCE signal.

Figure 4-23. SISOURCE Signal Timing

SCANCLK Signal

SCANCLK is an output-only signal that generates a pulse with the leading
edge occurring approximately 50 to 100 ns after an A/D conversion begins.
The polarity of this output is software selectable but is typically configured
so that a low-to-high leading edge can clock external AI multiplexers
indicating when the input signal has been sampled and can be removed.
This signal has a 400 to 500 ns pulse width and is software enabled.
Figure 4-24 shows the timing for the SCANCLK signal.

Note

When using NI-DAQ, SCANCLK polarity is low-to-high and cannot be changed

programmatically.

Figure 4-24. SCANCLK Signal Timing

t

w

= 23 ns minimum

t

p

= 50 ns minimum

t

w

t

w

t

p

t

w

= 400 to 500 ns

t

d

= 50 to 100 ns

CONVERT*

SCANCLK

t

d

t

w

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