VXI 3002 - Manual (Page 61)

STATUS BYTE
3-31
Status data structure - register model
Below is a generalized model of the Register Set which funnels the monitored data into a single
summary bit to set the appropriate bit in the Status Byte.
Event
Enable
Register
Summary Message
&
&
&
&
&
Transition
Filter #
Condition
Register
Event
Register
C0072
Device Status continuously monitored by Condition Register
OR
d d d d d d
n n-1 3 1 2 0
&
d
d
d
d
d
d
d
d
3 1 2 0
d d d d
3 1 2 0
d
d
d
d
n
n
n-1
n-1
d d
n n-1
3 2 1 0
The Device Status is continuously monitored by the Condition Register. If a Query to read a
Condition Register is provided, the Response represents the Status of the instrument at the moment
the Response is generated. A Condition Register cannot be written to.
The Transition Filter determines which transition of the Condition Register data bits will set
the corresponding bit in the Event Register. Either positive-going, negative-going or both
transitions can set bits in an Event Register. But with this instrument the Transition Filters
are pre-set as either Positive or Negative, as described in the following pages.
The bits in an Event Register are "latched". Once set they remain set, regardless of
subsequent changes in the associated condition bit until the Event Register is cleared by being
read or by the *CLS common command. Once cleared, an Event Register bit will only be set
again if the appropriate change in the Condition bit occurs.
The Event Enable Register may be both written to and read from. It is bitwise AND-ed with
the Event Register and if the result is non-zero the Summary Message is true, otherwise the
Summary Message is false. Enable Registers are not affected by *CLS but are however clear
at power-on.
Notes