Artesyn MVME55006E Single Board Computer Installation and Use (July 2014) - Manual (Page 49)

Functional Description
MVME55006E Single Board Computer Installation and Use (6806800A37J) 49
2.4 Processor
The MVME5500 supports the MPC7457 processor in the 483-pin CBGA package. The processor
consists of a processor core, an internal 256KB L2 and an internal L3 tag and controller, which
supports a backside L3 cache.
2.5 L3 Cache
The MVME5500 uses two 8Mb SDR synchronous SRAM devices for the processor’s L3 cache
data SRAM. This gives the processor a total of 2MB of L3 cache. These SRAM devices require a
3.3V core voltage. The MVME5500 provides 2.5V as the SRAM I/O voltage. The L3 bus operates
at 200 MHz.
NVRAM – 32KB provided by MK48T37
Real Time Clock – Provided by MK48T37
Watchdog Timers – One in GT-64260B
– One in MK48T37
– Each watchdog timer can generate interrupt or reset, software
selectable
On-board Peripheral Support – One 10/100/1000BaseT Ethernet interface, one 10/100BaseT
Ethernet interface
– Dual 16C550 compatible UARTs
PCI Mezzanine Cards – Two PMC sites (one shared with the expansion memory and has
IPMC capability)
PCI Expansion – One expansion connector for interface to PMCspan
Miscellaneous – Reset/Abort switch
– Front-panel status indicators, Run and Board Fail
Form Factor – Standard VME
Table 2-1 MVME5500 Features Summary (continued)
Feature Description