Artesyn MVME55006E Single Board Computer Installation and Use (July 2014) - Manual (Page 55)

Functional Description
MVME55006E Single Board Computer Installation and Use (6806800A37J) 55
2.9.6 PCI Bus Arbitration
PCI arbitration for the MVME5500 PCI Buses 0.0 and 1.0 is provided by an external arbiter PLD.
The arbiter PLD implements a round-robin priority algorithm. PCI arbitration for PCI Bus 0.1 is
provided by the HiNT PCI 6154 secondary internal arbiter.
2.10 Asynchronous Serial Ports
The MVME5500 board uses two TL16C550C universal asynchronous receiver/transmitters
(UARTs) interfaced to the GT-64260B device bus to provide the asynchronous serial interfaces.
EIA232 drivers and receivers reside on board. COM1 signals are wired to an RS-232 transceiver
that interfaces to the front-panel RJ-45 connector. COM2 signals are also wired to a transceiver
that interfaces to an on-board 9-pin header (refer to
Chapter 5, Connector Pin Assignments , for
more details). An on-board 1.8432 MHz oscillator provides the baud rate clock for the UARTs.
Figure 2-2 COM1 Asynchronous Serial Port Connections (RJ-45)
SOUT
RTS#
DTR#
CTS#
DCD#
DSR#
RI#
TL16C550C
4
2
8
7
5
1
TXD
RTS
DTR
RXD
CTS
DCD
GND
SIN
3
NC
NC
RJ45
Connector
6