Artesyn MVME55006E Single Board Computer Installation and Use (July 2014) - Manual (Page 76)

MOTLoad Firmware
MVME55006E Single Board Computer Installation and Use (6806800A37J) 76
4.5.1 Default VME Settings
As shipped from the factory, the firmware on the MVME5500 will program default values into
the Universe II VME Interface chip. The firmware allows certain VME settings to be changed in
order for the user to customize his/her environment. The following is a description of the
default VME settings that are changeable by the user. For more information, refer to the
MOTLoad User’s Manual and Tundra’s Universe II User Manual, listed in
Appendix C, Related
Documentation .
 VME3PCI Master Enable = Y
N = Do not set up or enable the VMEbus Interface.
Y= Set up and enable the VMEbus Interface.

PCI Slave Image 0
This image is set to zeroes and thus disabled.
 PCI Slave Image 1 Control = C0820000
Sets LSI1_CTL to indicate that this image is enabled, write posting is enabled, VMEbus data
width is 32 bits, VMEbus address space is A32, data and non-supervisory AM encoding, no
BLT transfers to the VMEbus, and to accept addresses in PCI memory space.

PCI Slave Image 1 Base Address Register = 91000000
Sets LSI1_BS to indicate that the lower bound of PCI memory addresses to be transferred
to the VMEbus by this image is 0x91000000.
 PCI Slave Image 1 Bound Address Register = B0000000
Sets LSI1_BD to indicate that the upper bound of PCI memory addresses to be transferred
by this image is 0xB0000000.

PCI Slave Image 1 Translation Offset = 70000000
Sets LSI1_TO to indicate that the PCI memory address is to be translated by 0x70000000
before presentation on the VMEbus; the result of the translation is: 0x91000000 +
0x70000000 = 0x101000000, thus 0x01000000 on the VMEbus.
 PCI Slave Image 2 Control = C0410000
Sets LSI2_CTL to indicate that this image is enabled, write posting is enabled, VMEbus data
width is 16 bits, VMEbus address space is A24, data and non-supervisory AM encoding, no
BLT transfers to the VMEbus, and to accept addresses in PCI memory space.
 PCI Slave Image 2 Base Address Register = B0000000
Sets LSI2_BS to indicate that the lower bound of PCI memory addresses to be transferred
to the VMEbus by this image is 0xB0000000.