Document Outline

• TOP
• PREACE
• READING THIS MANUAL
• CONTENTS
• CHAPTER 1 OVERVIEW
  • 1.1 MB89950/950A Series Features
  • 1.2 MB89950/950A Series Product Range
  • 1.3 Differences among Products
  • 1.4 Block Diagram of MB89950/950A Series
  • 1.5 Pin Assignment
  • 1.6 Package Dimensions
  • 1.7 I/O Pins and Pin Functions
• CHAPTER 2 HANDLING DEVICES
  • 2.1 Notes on Handling Devices
• CHAPTER 3 CPU
  • 3.1 Memory Space
    • 3.1.1 Special Areas
    • 3.1.2 Storing 16-bit Data in Memory
  • 3.2 Dedicated Registers
    • 3.2.1 Condition Code Register (CCR)
    • 3.2.2 Register Bank Pointer (RP)
  • 3.3 General-purpose Registers
  • 3.4 Interrupts
    • 3.4.1 Interrupt Level Setting Registers (ILR1, ILR2, ILR3)
    • 3.4.2 Interrupt Processing
    • 3.4.3 Multiple Interrupts
    • 3.4.4 Interrupt Processing Time
    • 3.4.5 Stack Operation during Interrupt Processing
    • 3.4.6 Stack Area for Interrupt Processing
  • 3.5 Resets
    • 3.5.1 External Reset Pin
    • 3.5.2 Reset Operation
    • 3.5.3 Pin States during Reset
  • 3.6 Clocks
    • 3.6.1 Clock Generator
    • 3.6.2 Clock Controller
    • 3.6.3 Oscillation Stabilization Delay Time
  • 3.7 Standby Mode (Low-power Consumption)
    • 3.7.1 Operating States in Standby Mode
    • 3.7.2 Sleep Mode
    • 3.7.3 Stop Mode
    • 3.7.4 Standby Control Register (STBC)
    • 3.7.5 State Transition Diagram
    • 3.7.6 Notes on Using Standby Mode
  • 3.8 Memory Access Mode
• CHAPTER 4 I/O PORTS
  • 4.1 Overview of I/O Ports
  • 4.2 Port 0
    • 4.2.1 Port 0 Data Register (PDR0)
    • 4.2.2 Operation of Port 0
  • 4.3 Port 1
    • 4.3.1 Port 1 Data Register (PDR1)
    • 4.3.2 Operation of Port 1
  • 4.4 Port 2
    • 4.4.1 Port 2 Data Register (PDR2)
    • 4.4.2 Operation of Port 2
  • 4.5 Port 3
    • 4.5.1 Port 3 Data Register (PDR3)
    • 4.5.2 Operation of Port 3
  • 4.6 Port 4
    • 4.6.1 Port 4 Registers (PDR4, DDR4)
    • 4.6.2 Operation of Port 4
  • 4.7 Program Example for I/O Ports
• CHAPTER 5 TIMEBASE TIMER
  • 5.1 Overview of Timebase Timer
  • 5.2 Block Diagram of Timebase Timer
  • 5.3 Timebase Timer Control Register (TBTC)
  • 5.4 Timebase Timer Interrupt
  • 5.5 Operation of Timebase Timer
  • 5.6 Notes on Using Timebase Timer
  • 5.7 Program Example for Timebase Timer
• CHAPTER 6 WATCHDOG TIMER
  • 6.1 Overview of Watchdog Timer
  • 6.2 Block Diagram of Watchdog Timer
  • 6.3 Watchdog Timer Control Register (WDTC)
  • 6.4 Operation of Watchdog Timer
  • 6.5 Notes on Using Watchdog Timer
  • 6.6 Program Example for Watchdog Timer
• CHAPTER 7 8-BIT PWM TIMER
  • 7.1 Overview of 8-bit PWM Timer
  • 7.2 Block Diagram of 8-bit PWM Timer
  • 7.3 Structure of 8-bit PWM Timer
    • 7.3.1 PWM Control Register (CNTR)
    • 7.3.2 PWM Compare Register (COMR)
  • 7.4 8-bit PWM Timer Interrupts
  • 7.5 Operation of Interval Timer Function
  • 7.6 Operation of PWM Timer Function
  • 7.7 States in Each Mode during 8-bit PWM Timer Operation
  • 7.8 Notes on Using 8-bit PWM Timer
  • 7.9 Program Example for 8-bit PWM Timer
• CHAPTER 8 PULSE WIDTH COUNT TIMER (PWC)
  • 8.1 Overview of Pulse Width Count Timer
  • 8.2 Block Diagram of Pulse Width Count Timer
  • 8.3 Structure of Pulse Width Count Timer
    • 8.3.1 PWC Pulse Width Control Register 1 (PCR1)
    • 8.3.2 PWC Pulse Width Control Register 2 (PCR2)
    • 8.3.3 PWC Reload Buffer Register (RLBR)
    • 8.3.4 PWC Noise Filter Control Register (NCCR)
  • 8.4 Pulse Width Count Timer Interrupts
  • 8.5 Operation of Interval Timer Function
  • 8.6 Operation of Pulse Width Measurement Function
  • 8.7 Operation of Noise Filter Circuit
  • 8.8 States in Each Mode during Pulse Width Count Timer Operation
  • 8.9 Notes on Using Pulse Width Count Timer
  • 8.10 Program Example for Timer Function of Pulse Width Count Timer
• CHAPTER 9 8-BIT SERIAL I/O
  • 9.1 Overview of 8-bit Serial I/O
  • 9.2 Block Diagram of 8-bit Serial I/O
  • 9.3 Structure of 8-bit Serial I/O
    • 9.3.1 Serial Mode Register (SMR)
    • 9.3.2 Serial Data Register (SDR)
  • 9.4 8-bit Serial I/O Interrupts
  • 9.5 Operation of Serial Output
  • 9.6 Operation of Serial Input
  • 9.7 States in Each Mode during 8-bit Serial I/O Operation
  • 9.8 Notes on Using 8-bit Serial I/O
  • 9.9 Connection Example for 8-bit Serial I/O
  • 9.10 Program Example for 8-bit Serial I/O
• CHAPTER 10 UART
  • 10.1 Overview of UART
  • 10.2 Structure of UART
  • 10.3 UART Pins
  • 10.4 UART Registers
    • 10.4.1 Serial Mode Control Register 1 (SMC1)
    • 10.4.2 Serial Rate Control Register (SRC)
    • 10.4.3 Serial Status and Data Register (SSD)
    • 10.4.4 Serial Input Data Register (SIDR)
    • 10.4.5 Serial Output Data Register (SODR)
    • 10.4.6 Serial Mode Control Register 2 (SMC2)
  • 10.5 UART Interrupts
  • 10.6 Operation of UART
  • 10.7 Operation of Mode 0, 1, 3
  • 10.8 Program Example for UART
• CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT (EDGE)
  • 11.1 Overview of the External Interrupt Circuit
  • 11.2 Block Diagram of the External Interrupt Circuit
  • 11.3 Structure of the External Interrupt Circuit
    • 11.3.1 External Interrupt Control Register (EIC)
  • 11.4 External Interrupt Circuit Interrupts
  • 11.5 Operation of the External Interrupt Circuit
  • 11.6 Program Example for the External Interrupt Circuit
• CHAPTER 12 LCD CONTROLLER/DRIVER
  • 12.1 Overview of LCD Controller/Driver
  • 12.2 Block Diagram of LCD Controller/Driver
    • 12.2.1 LCD Controller/Driver Internal Voltage Divider
    • 12.2.2 LCD Controller/Driver External Voltage Divider
  • 12.3 Structure of LCD Controller/Driver
    • 12.3.1 LCD Control Register (LCDR)
    • 12.3.2 Segment Output Select Register (SEGR)
    • 12.3.3 Display RAM
  • 12.4 Operation of LCD Controller/Driver
    • 12.4.1 Output Waveforms during LCD Controller/Driver Operation (1/2 Duty Ratio)
    • 12.4.2 Output Waveforms during LCD Controller/Driver Operation (1/3 Duty Ratio)
    • 12.4.3 Output Waveforms during LCD Controller/Driver Operation (1/4 Duty Ratio)
  • 12.5 Program Example for LCD Controller/Driver
• APPENDIX
  • APPENDIX A I/O Map
  • APPENDIX B Overview of Instructions
    • B.1 Overview of F2MC-8L Instructions
    • B.2 Addressing
    • B.3 Special Instructions
    • B.4 Bit Manipulation Instructions (SETB, CLRB)
    • B.5 F2MC-8L Instructions
    • B.6 Instruction map
  • APPENDIX C Mask Options
  • APPENDIX D Programming Specifications for One-Time PROM And EPROM Microcontroller
    • D.1 Programming Specifications for One-time PROM and EPROM Microcontrollers
    • D.2 Programming Yield and Erasure
    • D.3 Programming to the EPROM with Piggyback/Evaluation Device
  • APPENDIX E MB89950/950A Series Pin States
• INDEX
  • Numerics
  • A
  • B
  • C
  • D
  • E
  • F
  • G
  • H
  • I
  • L
  • M
  • N
  • O
  • P
  • R
  • S
  • T
  • U
  • V
  • W