FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 89)

75
CHAPTER 4 I/O PORTS
4.2.2 Operation of Port 0
This section describes the operations of the port 0.
■ Operation of port 0
●
Operation as an output port
• When the output latch value is "0", the output transistor turns "ON" and an "L" level is output from the
pin. When the output latch value is "1", the transistor turns "OFF" and high impedance (Hi-Z) is output
to the pin.
• Writing data to the PDR0 register stores the data in the output latch and it will be output to the pin.
• Reading the PDR0 register returns the output latch value.
●
Operation as an input port
• Writing "0" to the PDR0 register set the port as an input port, the output transistor is "OFF" and the pin
goes to the high-impedance state.
• Reading the PDR0 register returns the pin value.
●
Operation as an LCD segment driver output
• When the LCD output mask option is selected, set the PDR0 register bits corresponding to the LCD
segment driver output pins to "1" to turn the output transistor "OFF".
• You cannot read the LCD output data by reading PDR0.
●
Operation at reset
• Resetting the CPU initializes the PDR0 register values to "1". This turns "OFF" the output transistor for
all pins and all pins are in high-impedance (Hi-Z) state.