FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 144)

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CHAPTER 7 8-BIT PWM TIMER
7.3.2 PWM Compare Register (COMR)
The PWM compare register (COMR) sets the interval time for the interval timer function.
The register value sets the "H" width of the pulse for the PWM timer function.
■ PWM compare register (COMR)
Figure 7.3-4 "PWM compare register (COMR)" shows the bit structure of the PWM compare register.
As the register is write-only, bit manipulation instructions cannot be used.
Figure 7.3-4 PWM compare register (COMR)
●
Interval timer operation
This register is used to set the value to be compared with the counter value. The register specifies the
interval time.
The counter is cleared when the counter value matches the value set in this register, and the interrupt
request flag bit is set to "1" (CNTR: TIR = "1").
If data is written to the COMR register during counter operation, the new value applies from the next cycle
(after the next match is detected).
Reference:
The COMR setting for interval timer operation can be calculated using the following formula.
COMR register value = interval time/(count clock cycle x instruction cycle) – 1
●
PWM timer operation
This register is used to set the value to be compared with the counter value. The register therefore sets the
"H" width of the pulse.
The PWM pin outputs an "H" level until the counter value matches the value set in this register. From the
match until the counter value overflows, the PWM pin outputs an "L" level.
If data is written to the COMR register during counter operation, the new value applies from the next cycle
(after the next overflow).
Reference:
In PWM timer operation, the COMR setting and the PWM cycle time can be calculated using the
following formulas.
COMR register value = duty ratio (%) x 256
PWM wave cycle = count clock cycle x instruction cycle x 256
Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Initial value
0013 H XXXXXXXX B
W W W W W W W W
W: Write-only
X: Indeterminate