FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 11)

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CONTENTS
CHAPTER 1 OVERVIEW ................................................................................................... 1
1.1 MB89950/950A Series Features ........................................................................................................... 2
1.2 MB89950/950A Series Product Range ................................................................................................. 4
1.3 Differences among Products ................................................................................................................ 6
1.4 Block Diagram of MB89950/950A Series ............................................................................................ 7
1.5 Pin Assignment ..................................................................................................................................... 8
1.6 Package Dimensions .......................................................................................................................... 10
1.7 I/O Pins and Pin Functions ................................................................................................................. 12
CHAPTER 2 HANDLING DEVICES ................................................................................ 17
2.1 Notes on Handling Devices ................................................................................................................ 18
CHAPTER 3 CPU ............................................................................................................ 21
3.1 Memory Space .................................................................................................................................... 22
3.1.1 Special Areas ................................................................................................................................. 24
3.1.2 Storing 16-bit Data in Memory ....................................................................................................... 26
3.2 Dedicated Registers ........................................................................................................................... 27
3.2.1 Condition Code Register (CCR) .................................................................................................... 29
3.2.2 Register Bank Pointer (RP) ........................................................................................................... 32
3.3 General-purpose Registers ................................................................................................................. 33
3.4 Interrupts ............................................................................................................................................. 35
3.4.1 Interrupt Level Setting Registers (ILR1, ILR2, ILR3) ..................................................................... 36
3.4.2 Interrupt Processing ....................................................................................................................... 37
3.4.3 Multiple Interrupts .......................................................................................................................... 39
3.4.4 Interrupt Processing Time .............................................................................................................. 40
3.4.5 Stack Operation during Interrupt Processing ................................................................................. 41
3.4.6 Stack Area for Interrupt Processing ............................................................................................... 42
3.5 Resets ................................................................................................................................................. 43
3.5.1 External Reset Pin ......................................................................................................................... 45
3.5.2 Reset Operation ............................................................................................................................. 46
3.5.3 Pin States during Reset ................................................................................................................. 48
3.6 Clocks ................................................................................................................................................. 49
3.6.1 Clock Generator ............................................................................................................................. 51
3.6.2 Clock Controller ............................................................................................................................. 53
3.6.3 Oscillation Stabilization Delay Time ............................................................................................... 55
3.7 Standby Mode (Low-power Consumption) ......................................................................................... 57
3.7.1 Operating States in Standby Mode ................................................................................................ 58
3.7.2 Sleep Mode ................................................................................................................................... 59
3.7.3 Stop Mode ..................................................................................................................................... 60
3.7.4 Standby Control Register (STBC) .................................................................................................. 61
3.7.5 State Transition Diagram ............................................................................................................... 63
3.7.6 Notes on Using Standby Mode ...................................................................................................... 65
3.8 Memory Access Mode ........................................................................................................................ 67