FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 74)

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CHAPTER 3 CPU
3.7.3 Stop Mode
This section describes the operations of stop mode.
■ Operation of stop mode
●
Entering stop mode
Stop mode stops the oscillation source. Almost all functions stop while maintaining all register and RAM
contents at their value immediately before entering stop mode.
Writing "1" to the stop bit in the standby control register (STBC: STP) puts the CPU to stop mode. At this
time, external pin states are held if the pin state specification bit (STBC: SPL) is "0". If SPL is "1", external
pins go to the high-impedance state. (Pins with the pull-up resistor (optional) go to the "H" level.)
If an interrupt request is generated when "1" is written to the STP bit, the write to the bit is ignored, and the
CPU continues the instruction execution without entering stop mode. (The CPU does not assume stop mode
even after completion of the interrupt processing.)
Prohibit interrupt request output from the timebase timer (TBTC: TBIE = "0") before entering stop mode in
main clock mode as necessary.
●
Wake-up from stop mode
A reset or an external interrupt wakes up the CPU from stop mode.
If reset occurs during stop mode on a product with power-on reset, the reset operation starts after the main
clock oscillation stabilization delay time. Products without power-on reset do not require for the oscillation
stabilization delay time after a reset in stop mode. The reset initializes pin states.
If an interrupt request with an interrupt level higher than "11
B
" occurs from an external interrupt circuit
during stop mode, the CPU wakes up from stop mode, regardless of the interrupt enable flag (CCR: I) and
interrupt level bits (CCR: IL1, IL0) in the CPU. Only external interrupt requests can occur during stop
mode because peripheral functions are stopped.
After wake-up from stop mode, the normal interrupt operation is performed after the oscillation
stabilization delay time has passed. If the interrupt request is accepted, the CPU executes interrupt
processing. If the interrupt request is not accepted, the CPU continues execution from the subsequent
instruction following the instruction executed immediately before entering stop mode.
Some peripheral functions restart from mid-operation when the CPU wakes up from stop mode by an
external interrupt. The first interval time from the interval timer function, for example, is indeterminate.
Therefore, initialize all peripheral functions after wake-up from stop mode.
Note:
Only interrupt requests from external interrupt circuits can be used to wake up from stop mode by an
interrupt.