FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 146)

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CHAPTER 7 8-BIT PWM TIMER
7.5 Operation of Interval Timer Function
This section describes the operation of the interval timer function of the 8-bit PWM
timer.
■ Operation of interval timer function
Figure 7.5-1 "Interval timer function settings" shows the settings required to operate as an interval timer
function.
Figure 7.5-1 Interval timer function settings
On activation, the counter starts to count up from "00
H
" on the rising edge of the selected count clock.
When the counter value matches the value set in the COMR register (compare value), the PWM timer
inverts the level of the output pin (PWM) on the next rising edge of the count clock, clears the counter, sets
the interrupt request flag bit (CNTR: TIR = "1"), and restarts counting from "00
H
".
Figure 7.5-2 "Operation of 8-bit PWM timer" shows the operation of the 8-bit PWM timer.
Figure 7.5-2 Operation of 8-bit PWM timer
CNTR P/T P1 P0 TPE TIR OE TIE
0 1
COMR Sets interval time (compare value).
: Used bit
1 : Set "1".
0 : Set "0".
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Counter value Compare value (FF H ) Compare value (80 H )
FF H
80 H
00 H
COMR value (FF H )
Timer cycle COMR value modified (FF H 80 H )*
Cleared by the program
Time
TIR bit
TPE bit
OE bit
PWM pin
When the output pin control bit (OE) is "0", the pin operates as a general-purpose I/O port (P41).
*: If the PWM compare register (COMR) value is modified during counter operation, the new value will be effective in next cycle.