FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 279)

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APPENDIX A I/O Map
●
Read/write access symbols
R/W: Readable and writable
R: Read-only
W: Write-only
●
Initial value symbols
0: The initial value of this bit is "0"
1: The initial value of this bit is "1"
X: The initial value of this bit is undefined
-: Unused
Note:
Do not use vacancies.
1D
H
SDR Serial data register R/W XXXXXXXX
B
1E
H
(Vacancy)
1F
H
20
H
SMC1 UART serial mode control register 1 R/W 00000-00
B
21
H
SRC UART serial rate control register R/W --011000
B
22
H
SSD UART serial status/data register R/W 00100-1X
B
23
H
SIDR/SODR UART serial data register R/W XXXXXXXX
B
24
H
SMC2 UART serial mode control register 2 R/W --1-0-00
B
25
H
to 2F
H
(Vacancy)
30
H
EIC External interrupt control register R/W 00000000
B
31
H
to 63
H
(Vacancy)
64
H
to 78
H
VRAM LCD data RAM R/W XXXXXXXX
B
79
H
LCDR LCD control register R/W -0010000
B
7A
H
SEGR Segment output select register R/W -0000000
B
7B
H
(Vacancy)
7C
H
ILR1 Interrupt level setting register 1 W 11111111
B
7D
H
ILR2 Interrupt level setting register 2 W 11111111
B
7E
H
ILR3 Interrupt level setting register 3 W 11111111
B
7F
H
ITR Interrupt test register Access
prohibited
XXXXXX00
B
Table A-1 I/O map (2/2)
Address Register name Register description Read/Write Initial value