FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 153)

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CHAPTER 7 8-BIT PWM TIMER
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Coding example
CNTR EQU 0012H ; Address of the PWM control register
COMR EQU 0013H ; Address of the PWM compare register
TPE EQU CNTR:3 ; Define the counter operation enable bit.
TIR EQU CNTR:2 ; Define the interrupt request flag bit.
ILR1 EQU 007CH ; Address of the interrupt level setting register 3
INT_V DSEG ABS ; [DATA SEGMENT]
ORG 0FFF6H
IRQ2 DW WARI ; Set interrupt vector.
INT_V ENDS
;-----Main program---------------------------------------------------------------
CSEG ; [CODE SEGMENT]
; Stack pointer (SP) etc. are already initialized.
:
CLRI ; Disable interrupts.
CLRB TPE ; Stop counter operation.
MOV ILR1,#11011111B ; Set interrupt level (level 1).
MOV COMR,#061H ; Value compared with the counter value
(interval time)
MOV CNTR,#00101011B ; Operate interval timer, select 64 tinst,
start counter operation, clear interrupt request
flag, enable TO pin output, enable interrupt
request output.
SETI ; Enable interrupts.
:
;-----Interrupt program----------------------------------------------------------
WARI CLRB TIR ; Clear interrupt request flag.
PUSHW A
XCHW A,T ; Save A and T.
PUSHW A
:
User processing
:
POPW A
XCHW A,T ; Restore A and T.
POPW A
RETI
ENDS
;--------------------------------------------------------------------------------
END