FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 205)

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CHAPTER 9 8-BIT SERIAL I/O
●
Coding example
SMR EQU 001CH ; Serial mode register
SDR EQU 001DH ; Serial data register
SIOF EQU SMR:7 ; Define the interrupt request flag bit.
SST EQU SMR:0 ; Define the serial I/O transfer start bit.
ILR2 EQU 007DH ; Address of the interrupt level setting register 2
INT_V DSEG ABS ; [DATA SEGMENT]
ORG 0FFF0H
IRQ5 DW WARI ; Set interrupt vector.
INT_V ENDS
;-----Main program----------------------------------------------------------------
CSEG ; [CODE SEGMENT]
; Stack pointer (SP) etc. are already initialized.
:
CLRI ; Disable interrupts.
CLRB SST ; Stop serial I/O transfer.
MOV ILR2,#11110111B ; Set interrupt level (level 1).
MOV SDR,#55H ; Set transfer data (55H).
MOV SMR,#01111000B ; Clear Interrupt request flag, enable interrupt
; request output, enable shift clock output (SCK),
; enable serial data output (SO), select 32 tinst,
; LSB first.
SETB SST ; Start serial I/O transfer.
SETI ; Enable interrupts.
:
;-----Interrupt processing routine------------------------------------------------
WARI CLRB SIOF ; Clear interrupt request flag.
PUSHW A
XCHW A,T ; Save A and T.
PUSHW A
MOV SDR,#55H ; Reset transfer data (55H).
SETB SST ; Start serial I/O transfer.
:
User processing
:
POPW A
XCHW A,T ; Restore A and T
POPW A
RETI
ENDS
;---------------------------------------------------------------------------------
END