4 serial input data register (sidr) – FUJITSU Semiconductor Controller MB89950/950A User Manual

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CHAPTER 10 UART

10.4.4

Serial Input Data Register (SIDR)

The serial input data register (SIDR) is used to input (receive) serial data.

Serial input data register (SIDR)

Figure 10.4-5 "Serial input data register (SIDR)" shows the bit allocations of the serial input data register.

Figure 10.4-5 Serial input data register (SIDR)

This register stores received data. Serial data received from the serial data input pin is converted to parallel

in the shift register and stored in this register.

Operation in mode 0 and 1

If received data is normally set in this register, the receive data flag bit (RDRF) is set to "1", and a receive

interrupt request occurs if it is enabled. When the interrupt request is detected, check the RDRF bit in an

interrupt processing or in a program. If there is receive data stored in this register, read this register, and

then the RDRF flag is cleared automatically.

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Initial value

0023

H

XXXXXXXX

B

R

R

R

R

R

R

R

R

R

: Read-only

X

: Indeterminate

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Initial value

0023

H

XXXXXXXX

B

R

R

R

R

R

R

R

R

R

: Read-only

X

: Indeterminate

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