FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 19)

5
CHAPTER 1 OVERVIEW
Table 1.2-2 Common specifications for the MB89950/950A series
Parameter Specification
CPU functions Number of instructions: 136
Instruction bit length: 8 bits
Instruction length: 1 to 3 bytes
Data bit length: 1, 8, 16 bits
Minimum execution time: 0.80
µs to 12.8 µs at 5 MHz
Interrupt processing time: 7.26 µs to 115.2 µs at 5 MHz
Peripheral
functions Ports General-purpose I/O ports (N-ch open-drain): 22 (also serve as LCD segment pins)
*1
General-purpose I/O ports (N-ch open-drain): 4 (two also serve as LCD bias pins)
General-purpose I/O ports (CMOS): 7 (6 ports serve as peripherals)
Total: 33 (max.)
20-bit timebase
timer 20 bits
Interrupt cycle: 6.55 ms, 26.21 ms, 104.86 ms, 419.43 ms at 5 MHz
Watchdog timer Reset generate cycle: min. 419.4 ms at 5 MHz
8-bit PWM
timer 8-bit reload timer operation (square wave output; operating frequency: 0.8 µs, 12.8
µs,
51.2 µs at 5 MHz)
8-bit resolution PWM operation (conversion frequency: 204.8 µs - 3.36 s)
Event count function
PWC timer 8-bit interval timer operation
8-bit pulse width measurement (continuous measurement, High-width, Low-width measurement and
One-cycle measurement)
Operation clock (0.8
µs, 3.2 µs, 25.6 µs at 5 MHz)
UART Transfer data length: 5, 7, 8 bits
Internal baud rate generator (Max. 78125 bps at 5 MHz)
8-bit serial I/O 8 bits
LSB first/MSB first selectability
One clock selectable from four transfer clocks (one external shift clock, three internal shift clocks: 1.6
µs, 6.4 µs, 25.6 µs at 5 MHz)
LCD controller/
driver Common output: 4 (max.)
Segment output: 42 (max.)
Operation mode: 1/2 bias and 1/2 duty, 1/3 bias and 1/3 duty, 1/3 bias and 1/4 duty
LCD display RAM size: 21 bytes (42 x 4 bits, max. 168 pixels)
Dividing voltage for LCD driving: built-in/external voltage divider selectable
External
interrupt 2 independent channels (interrupt vector, request flag, request output enable)
Edge selectability (rising/falling)
Note:
Unless otherwise specified, values given for clock cycle, conversion times, etc. are for 5 MHz operation.
*1: Segment pins can be selected by mask option.