FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 32)

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CHAPTER 2 HANDLING DEVICES
2.1 Notes on Handling Devices
This section lists points to note regarding the power supply voltage, pins, and other
device handling aspects.
■ Notes on handling devices
●
Preventing latch-up
Latch-up may occur on CMOS ICs if voltage higher than V
CC
or lower than V
SS
is applied to input and
output pins other than medium to high-voltage pins or if higher than the voltage which shows on Absolute
Maximum Ratings is applied between V
CC
and V
SS
.
When latch-up occurs, supply current increases rapidly and might thermally damage elements. Take great
care not to exceed the absolute maximum ratings in circuit operation.
●
Treatment of unused input pins
Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-
down resistor.
●
Power supply voltage fluctuations
Although V
CC
power supply voltage is assured to operate within the rated, a rapid change to the IC is
therefore cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied of the IC
is therefore important. As stabilization guidelines, it is recommended to control power so that V
CC
ripple
fluctuations (P-P. value) will be less that 10% of the standard V
CC
value at the commercial frequency (50
to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary
fluctuation such as when power is switched.
●
Precaution when using an external clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (option
selection) and release from stop mode.