FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 289)

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APPENDIX B Overview of Instructions
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MULU A
This instruction performs an unsigned multiplication of AL (lower eight bits of the accumulator) and TL
(lower eight bits of the temporary accumulator), and stores the 16-bit result in A. The contents of T
(temporary accumulator) do not change. The contents of AH (higher eight bits of the accumulator) and TH
(higher eight bits of the temporary accumulator) before execution of the instruction are not used for the
operation. The instruction does not change the flags, and therefore care must be taken when a branch may
occur depending on the result of a multiplication.
Figure B.3-3 "MULU" shows a summary of the instruction.
Figure B.3-3 MULU
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DIVU A
This instruction divides the 16-bit value in T by the unsigned 8-bit value in AL, and stores the 8-bit result
and the 8-bit remainder in AL and TL, respectively. A value of 0 is set to both AH and TH. The contents
of AH before execution of the instruction are not used for the operation. An unpredictable result is
produced from data that results in more than eight bits. In addition, there is no indication of the result
having more than eight bits. Therefore, if it is likely that data will cause a result of more than eight bits, the
data must be checked to ensure that the result will not have more than eight bits before it is used.
The instruction does not change the flags, and therefore care must be taken when a branch may occur
depending on the result of a division.
Figure B.3-4 "DIVU A" shows a summary of the instruction.
Figure B.3-4 DIVU A
1 2 3 4 H
A
T
1 8 6 0 H A
T
(Before execution) (After execution)
1 2 3 4 H
5 6 7 8 H
1 8 6 2 H
A
T
0 0 3 4 H A
T
(Before execution) (After execution)
0 0 0 2 H
5 6 7 8 H