FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 185)

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CHAPTER 9 8-BIT SERIAL I/O
9.2 Block Diagram of 8-bit Serial I/O
Each channel of the 8-bit serial I/O consists of the following four blocks:
• Shift clock controller
• Shift clock counter
• Serial data register (SDR)
• Serial mode register (SMR)
■ Block diagram of 8-bit serial I/O
Figure 9.2-1 Block diagram of 8-bit serial I/O
SST
BDS
CKS0
CKS1
SCKE
SIOE
SOE
SIOF
IRQ5
D7 to D0
D7 to D0 D0 to D7
2
/
P43/SI
P44/SO
2t inst
8t inst
32t inst
P45/SCK
Internal data bus
MSB first
Transfer direction
selection
LSB first
Pin
Pin
Pin
(Shift direction)
Serial data register (SDR)
Output buffer
Output enable
Shift clock selection
Output enable
Output buffer
Shift clock controller
Overflow
Serial mode register
(SMR)
Clear
Shift clock counter
t inst : Instruction cycle
Note: The SO and SCK output serve as UART outputs. They can be used as the outputs of the serial I/O when the
RESL bit of SMC2 in the UART is "1".