FUJITSU Semiconductor Controller MB89950/950A - Manual (Page 177)

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CHAPTER 8 PULSE WIDTH COUNT TIMER (PWC)
8.8 States in Each Mode during Pulse Width Count Timer
Operation
This section describes the operation of the pulse width count timer when the device
goes to sleep or stop mode, or an operation halt request occurs during operation.
■ Operation during standby mode or operation halt
Figure 8.8-1 "Counter operation during standby mode or operation halt" shows the counter value state when
the device goes to sleep or stop mode, or an operation halt request occurs, during operation of the interval
timer function or pulse width measurement function.
The counter halts and maintains its current value when the device goes to stop mode. Operation starts again
from the stored counter value after wake-up from stop mode by an external interrupt. Therefore, the first
interval time or pulse width measurement is not correct value. Always initialize the pulse width count timer
after wake-up from stop mode.
Figure 8.8-1 Counter operation during standby mode or operation halt
Counter value
FF H
80 H
00 H
RLBR value (FF H )
Timer cycle
Stop request
Oscillation stabilization delay time
Interval time after wake-up from
stop mode (indeterminate)
Time
UF bit
Cleared by
the program
Operation halts
Operation restarts
EN bit
IE bit
SLP bit
(STBC register)
STP bit
(STBC register)
Wake-up from stop mode by an external interrupt
Wake-up from sleep mode by IRQ3
Stop mode
Sleep mode